CY62146DV30LL-70BVI Cypress Semiconductor Corp, CY62146DV30LL-70BVI Datasheet - Page 5

• Manufacturer Part Number: CY62146DV30LL-70BVI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62146DV30LL-70BVI

• Density: 4Mb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3V
• Address Bus: 18b
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 15mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Word Size: 16b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05339 Rev. *A
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
12. Test conditions for all parameters other than three-state parameters assume signal transition time of 3 ns (1V/ns) or less, timing reference levels of V
13. At any given temperature and voltage condition, t
14. t
15. The internal Write time of the memory is defined by the overlap of WE, CE = V
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
BW
SD
HD
HZWE
LZWE
Parameter
input pulse levels of 0 to V
given device.
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
HZOE
, t
HZCE
[15]
, t
HZBE
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to LOW Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
BLE/BHE LOW to Data Valid
BLE/BHE LOW to Low Z
BLE/BHE HIGH to HIGH Z
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
BLE/BHE LOW to Write End
Data Set-up to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
, and t
HZWE
CC(typ.)
transitions are measured when the outputs enter a high-impedence state.
, and output loading of the specified I
Description
Over the Operating Range
[13]
[13]
[13, 14]
[13, 14]
[13, 14]
[13]
[13]
HZCE
[13, 14]
is less than t
LZCE
OL
, t
Min.
/I
HZBE
45
10
10
10
45
40
40
35
40
25
10
OH
5
0
0
0
0
[12]
45 ns
as shown in the “AC Test Loads and Waveforms” section.
IL
is less than t
, BHE and/or BLE = V
[10]
Max.
45
45
25
15
20
45
25
15
15
LZBE
, t
Min.
HZOE
55
10
10
10
55
40
40
40
25
10
40
5
0
0
0
0
IL
. All signals must be ACTIVE to initiate a write and any
is less than t
55 ns
Max.
55
55
25
20
20
55
25
20
20
LZOE
, and t
Min.
70
10
10
10
70
60
60
45
60
30
10
CY62146DV30
HZWE
5
0
0
0
0
70 ns
is less than t
Max.
70
70
35
25
25
70
35
25
25
Page 5 of 11
LZWE
CC(typ)
Unit
for any
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
/2,
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