CY7C1355B-133AC Cypress Semiconductor Corp, CY7C1355B-133AC Datasheet - Page 19

• Manufacturer Part Number: CY7C1355B-133AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1355B-133AC

• Density: 9Mb
• Access Time (max): 6.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 250mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05117 Rev. *C
Identification Register Definitions
Scan Register Sizes
Identification Codes
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Bypass
ID
Boundary Scan Order
Instruction
Instruction Field
Register Name
Code
000
001
010
011
100
101
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state. This instruction is not 1149.1 compliant.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation. This instruction does not implement 1149.1 preload func-
tion and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
00000110100
CY7C1355B
(256KX36)
000000
100110
01010
001
1
Bit Size (x36)
00000110100
CY7C1357B
(512KX18)
000000
010110
32
71
01010
3
1
001
1
Description
Describes the version number
Reserved for Internal Use
Defines memory type and architecture
Defines width and density
Allows unique identification of SRAM vendor
Indicates the presence of an ID register
Description
Bit Size (x18)
32
71
3
1
CY7C1355B
CY7C1357B
Page 19 of 32
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