CY7C65640-LFC Cypress Semiconductor Corp, CY7C65640-LFC Datasheet - Page 11

• Manufacturer Part Number: CY7C65640-LFC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C65640-LFC

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

6.0
Table 6-1 below displays the pin assignments for the CY7C65640.
Table 6-1. Pin Assignments
Document #: 38-08019 Rev. *E
SPI INTERFACE
UPSTREAM PORT
DOWNSTREAM PORT 1
Pin
11
15
19
23
27
33
39
45
55
12
16
20
24
28
34
40
47
50
56
21
22
46
26
25
48
49
17
18
13
3
7
4
8
Pin Description Table
BUSPOWER
SPI_SCK
RESET#
SPI_CS
SPI_SD
DD–[1]
XOUT
Name
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
XIN
D–
D+
Output
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Type
Input
Input
Input
I/O/Z
I/O/Z
I/O/Z
I/O/Z
O
O
Default
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
O
O
Z
Z
Z
Z
Description
V
V
V
V
V
V
V
V
V
V
V
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
GND. Connect to Ground with as short a path as possible.
24-MHz Crystal IN or External Clock Input.
24-MHz Crystal OUT.
Active LOW Reset. This pin resets the entire chip. It is normally tied to V
through a 100K resistor, and to GND through a 0.1-µF capacitor. Other than
this, no other special power-up procedure is required.
VBUS. Connect to the VBUS pin of the upstream connector. This signal
indicates to the hub that it is in a powered state, and may enable the D+ pull-up
resistor to indicate a connection. (The hub will do so after the external
EEPROM is read, unless it is put into a high-speed mode by the upstream
hub). The hub can not be bus powered, and the VBUS signal must not be
used as a power source.
SPI Chip Select. Connect to CS pin of the EEPROM.
SPI Clock. Connect to EEPROM SCK pin.
SPI Dataline Connect to GND with 15-KΩ resistor and to the Data I/O pins
of the EEPROM.
Upstream D– Signal.
Upstream D+ Signal.
Downstream D– Signal.
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
. This signal provides power to the chip.
CY7C65640
Page 11 of 27
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