CY2308SC-3T Cypress Semiconductor Corp, CY2308SC-3T Datasheet - Page 3

CY2308SC-3T

Manufacturer Part Number
CY2308SC-3T
Description
Manufacturer
Cypress Semiconductor Corp
Type
Zero Delay PLL Clock Driverr
Datasheet

Specifications of CY2308SC-3T

Number Of Elements
1
Supply Current
45mA
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SOIC
Output Frequency Range
10 to 133.3MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Pin Count
16
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2308SC-3T
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Available CY2308 Configurations
Zero Delay and Skew Control
To close the feedback loop of the CY2308, the FBK pin is driven
from any of the eight available output pins. The output driving the
FBK pin drives a total load of 7 pF plus any additional load that
it drives. The relative loading of this output to the remaining
outputs adjusts the input-output delay. This is shown in the
Figure
For applications requiring zero input-output delay, all outputs
including the one providing feedback is equally loaded.
Document Number: 38-07146 Rev. *H
Note
CY2308–1
CY2308–1H
CY2308–2
CY2308–2
CY2308–3
CY2308–3
CY2308–4
CY2308–5H
5. Output phase is indeterminant (0° or 180° from input clock). If phase integrity is required, use the CY2308–2.
Figure 2. REF. Input to CLKA/CLKB Delay Versus Difference in Loading between FBK Pin and CLKA/CLKB Pins
2.
Device
Bank A or Bank B
Bank A or Bank B
Bank A
Bank B
Bank A
Bank B
Bank A or Bank B
Bank A or Bank B
Feedback From
Reference
Reference
Reference
2 X Reference
2 X Reference
4 X Reference
2 X Reference
Reference /2
Bank A Frequency
If input-output delay adjustments are required, use the
Delay and Skew Control
between the feedback output and remaining outputs.
For zero output-output skew, outputs are loaded equally. For
further information on using CY2308, refer to the application note
“CY2308: Zero Delay Buffer.”
Reference
Reference
Reference/2
Reference
Reference or Reference
2 X Reference
2 X Reference
Reference /2
graph to calculate loading differences
Bank B Frequency
[5]
CY2308
Page 3 of 15
Zero
[+] Feedback

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