TE28F400B3B90 Intel, TE28F400B3B90 Datasheet - Page 7

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TE28F400B3B90

Manufacturer Part Number
TE28F400B3B90
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F400B3B90

Cell Type
NOR
Density
4Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
18b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
256K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

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1.0
Preliminary
V
V
V
Bus Width
Speed
Memory Arrangement
Blocking (top or bottom)
Locking
Operating Temperature
Program/Erase Cycling
Packages
CC
CCQ
PP
Table 1.
Program/Erase Voltage
Read Voltage
I/O Voltage
Feature
Introduction
This datasheet contains the specifications for the 3-Volt Advanced Boot Block Flash Memory
family, which is optimized for portable, low-power, systems. This family of products features
1.65 V–2.5 V or 2.7 V–3.6 V I/Os, and a low V
Program, and Erase operations. In addition, this family is capable of fast programming at 12 V.
Throughout this document, the term “2.7 V” refers to the full voltage range 2.7 V–3.6 V (except
where noted otherwise) and “V
overview of the Flash Memory family including applications, pinouts, and pin descriptions.
Section 3.0 describes the memory organization and operation for these products. Sections 4.0 and
5.0 contain the operating specifications. Finally, Sections 6.0 and 7.0 provide ordering and other
reference information.
The 3-Volt Advanced Boot Block Flash Memory features the following:
3-Volt Advanced Boot Block Feature Summary
NOTES:
1. 32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
2. 8-Mbit densities not available in BGA* CSP.
3. V
4. 4-Mbit densities not available on 48-Ball VF BGA.
CC
Enhanced blocking for easy segmentation of code and data or additional design flexibility
Program Suspend to Read command
V
diagrams and V
Maximum program and erase time specification for improved data storage.
CCQ
Max is 3.3 V on 0.25 m 32-Mbit devices.
input of 1.65 V–2.5 V or 2.7 V–3.6 V on all I/Os. See Figures 1 through 4 for pinout
28F004B3
2048 Kbit x 8 (16 Mbit)
48-Ball
1024 Kbit x 8 (8 Mbit),
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
512 Kbit x 8 (4 Mbit)
40-lead TSOP
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
CCQ
28F016B3
Sixty-three 64-Kbyte main blocks (32 Mbit)
Thirty-one 64-Kbyte main blocks (16 Mbit)
location
8 bit
(2)
BGA* CSP
, 28F008B3,
WP# locks/unlocks parameter blocks
Eight 8-Kbyte parameter blocks and
All other blocks protected using V
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
Fifteen 64-Kbyte blocks (8 Mbit) or
Seven 64-Kbyte blocks (4 Mbit) or
2.7 V– 3.6 V or 11.4 V– 12.6 V
1.65 V–2.5 V or 2.7 V– 3.6 V
PP
Extended: –40 C to +85 C
(1)
,
= 12 V” refers to 12 V ±5%. Section 1.0 and 2.0 provide an
(2)
100,000 cycles
2.7 V– 3.6 V
CC
28F400B3
28F160B3, 28F320B3
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
48-Ball
/V
256 Kbit x 16 (4 Mbit),
512 Kbit x 16 (8 Mbit),
48-Ball VF BGA
PP
48-Lead TSOP,
28F640B3
operating range of 2.7 V–3.6 V for Read,
PP
16 bit
(2)
BGA CSP
, 28F800B3,
(4)
(2)
(3)
,
,
Section
Section 4.4
Section 4.2, 4.4
Section 4.2, 4.4
Table 3
Section 4.5
Section 2.2
Section 2.2
Appendix C
Section 3.3
Table 8
Section 4.2, 4.4
Section 4.2, 4.4
Figure
Reference
4,
4.2,
Figure 5
1

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