TDA8263HN/C1.118 NXP Semiconductors, TDA8263HN/C1.118 Datasheet - Page 8

• Manufacturer Part Number: TDA8263HN/C1.118
• Manufacturer: NXP Semiconductors

Specifications of TDA8263HN/C1.118

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 7:
9397 750 13193
Product data sheet
Subaddress
(hex)
0X
1X
2X
3X
4X
5X
6X
7X
8X
9X
I
2
C-bus write mode map
MSB
7
-
R2
N14
N6
FC4
BBGAIN3
CPCURSEL
AMPVCO2
CALTIME
BBIAS3
11.2 Address selection
11.3 Master-slave selection
11.4 Data transfer in write mode
11.5 I
Pins used for the I
Table 4:
Table 5:
The data transfer in write mode use the following pattern:
Table 6:
Subaddress is automatically incremented starting from the initial value.
Voltage on pin AS
0 V to 0.1
0.2
0.4
0.9
Voltage on pin MS
0 V to 0.1
0.9
START address
2
•
•
•
C-bus table in write mode
Pin SCL is the clock input
Pin SDA is the data input/output
Pin AS is for address selection.
6
-
R1
N13
N5
FC3
BBGAIN2
CPTST
AMPVCO1
-
BBIAS2
V
V
V
V
CC
CC
CC
CC
to 0.3
to 0.6
to V
to V
Address selection (pin AS)
Master-slave selection (pin MS)
I
V
V
2
C-bus write mode data transfer pattern
CC
CC
CC
CC
V
V
5
-
R0
N12
N4
FC2
BBGAIN1
FUP
AMPVCO0
-
BBIAS1
2
ack subaddress ack data 1
CC
CC
C-bus:
Rev. 01 — 14 December 2004
or open pin
4
PDXTOUT PDRSSI
D4
N11
N3
FC1
BBGAIN0
FDN
-
SELVTH1
BBIAS0
Write address
C0
C2
C4
C6
Crystal oscillator mode
master
slave
3
D3
N10
N2
FC0
-
CP2TST
-
SELVTH0
-
ack data 2
2
-
D2
N9
N1
-
-
FPFD2
-
SELVTL1
-
Fully integrated satellite tuner
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Read address
C1
C3
C5
C7
ack data n
TDA8263HN
1
-
D1
N8
N0
-
-
CPHIGH
PORT1
SELVTL0 -
-
LSB
0
TEST1
D0
N7
CALMANUAL
-
RFATT
-
PORT0
-
ack STOP
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