A43L0616BV-7F AMIC, A43L0616BV-7F Datasheet - Page 11

58T1324

A43L0616BV-7F

Manufacturer Part Number
A43L0616BV-7F
Description
58T1324
Manufacturer
AMIC
Datasheet

Specifications of A43L0616BV-7F

Memory Type
SDRAM
Memory Configuration
1M X 16
Access Time
6ns
Interface Type
LVTTL
Memory Case Style
TSOPII
No. Of Pins
50
Operating Temperature Range
0°C To +70°C
Frequency
143MHz
Rohs Compliant
Yes

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Simplified Truth Table
Note : 1. OP Code : Operand Code
(February, 2008, Version 1.3)
Register
Refresh
Bank Active & Row Addr.
Read &
Column Addr. Auto Precharge Enable
Write &
Column Addr. Auto Precharge Enable
Burst Stop
Precharge
Clock Suspend or
Active Power Down
Precharge Power Down Mode
DQM
No Operation Command
2. MRS can be issued only at both banks precharge state.
3. Auto refresh functions as same as CBR refresh of DRAM.
4. BA : Bank select address.
5. During burst read or write with auto precharge, new read write command cannot be issued.
6. Burst stop command is valid at every burst length.
7. DQM sampled at positive going edge of a CLK masks the data-in at the very CLK (Write DQM latency is 0),
A0~A10/AP,BA : Program keys. (@MRS)
A new command can be issued after 2 clock cycle of MRS.
The automatical precharge without Row precharge command is meant by “Auto”.
Auto/Self refresh can be issued only at both precharge state.
If “Low” at read, write, Row active and precharge, bank A is selected.
If “High” at read, write, Row active and precharge, bank B is selected.
If A10/AP is “High” at Row precharge, BA is ignored and both banks are selected.
Another bank read write command can be issued at every burst length.
but makes the data-out Hi-Z state after 2 CLK cycles. (Read DQM latency is 2)
Mode Register Set
Auto Refresh
Self
Refresh
Auto Precharge Disable
Auto Precharge Disable
Bank Selection
Both Banks
Command
Entry
Exit
Entry
Entry
Exit
Exit
CKEn-1 CKEn
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
H
X
X
H
H
X
X
L
X
X
X
L
L
CS
10
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
(V = Valid, X = Don’t Care, H = Logic High, L = Logic Low)
RAS CAS
H
H
X
H
H
H
X
X
H
X
V
X
H
X
L
L
L
L
X
H
H
H
H
H
H
H
X
X
X
X
V
X
X
L
L
L
L
WE
H
H
H
X
H
H
X
X
H
X
V
X
H
X
L
L
L
L
DQM
X
X
X
X
X
X
X
X
X
X
X
X
X
V
AMIC Technology, Corp.
BA A10/
V
V
V
V
X
OP CODE
AP
H
H
H
L
L
L
Row Addr.
X
X
X
X
X
X
X
Column
Column
A9~A0
A43L0616B
Addr.
Addr.
X
Notes
1,2
4,5
4,5
4
3
3
3
3
4
4
6
7

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