A43L0616BV-7F AMIC, A43L0616BV-7F Datasheet - Page 35

58T1324

A43L0616BV-7F

Manufacturer Part Number
A43L0616BV-7F
Description
58T1324
Manufacturer
AMIC
Datasheet

Specifications of A43L0616BV-7F

Memory Type
SDRAM
Memory Configuration
1M X 16
Access Time
6ns
Interface Type
LVTTL
Memory Case Style
TSOPII
No. Of Pins
50
Operating Temperature Range
0°C To +70°C
Frequency
143MHz
Rohs Compliant
Yes

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Read Interrupted by Precharge Command & Read Burst Stop Cycle (@Burst Length = Full Page)
(February, 2008, Version 1.3)
CLOCK
A10/AP
ADDR
(CL=2)
(CL=3)
CKE
RAS
CAS
DQM
CS
BA
DQ
DQ
WE
0
* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.
Row Active
(A-Bank)
RAa
RAa
1
2. About the valid DQ’s after burst stop, it is same as the case of
3. Burst stop is valid at every burst length.
Both cases are illustrated above timing diagram. See the label 1,2 on them.
But at burst write, burst stop and RAS interrupt should be compared carefully.
Refer the timing diagram of “Full page write burst stop cycle”.
2
3
(A-Bank)
* Note 1
Read
CAa
4
5
QAa0
6
QAa0
QAa1 QAa2
7
QAa1
8
* Note 2
Burst Stop
QAa2
QAa3
9
34
High
QAa4
QAa3
10
1
* Note 1
(A-Bank)
QAa4
Read
CAb
11
2
RAS interrupt.
12
QAb0 QAb1 QAb2 QAb3
13
QAb0
14
QAb1 QAb2 QAb3
AMIC Technology, Corp.
15
16
Precharge
(A-Bank)
QAb4 QAb5
17
A43L0616B
QAb4 QAb5
: Don't care
18
1
19
2

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