CY62147CV33LL-55BVI Cypress Semiconductor Corp, CY62147CV33LL-55BVI Datasheet - Page 6

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CY62147CV33LL-55BVI

Manufacturer Part Number
CY62147CV33LL-55BVI
Description
SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 55ns 48-Pin VFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62147CV33LL-55BVI

Package
48VFBGA
Timing Type
Asynchronous
Density
4 Mb
Typical Operating Supply Voltage
3.3 V
Address Bus Width
18 Bit
Number Of I/o Lines
16 Bit
Number Of Ports
1
Number Of Words
256K
Switching Characteristics
Document #: 38-05202 Rev. *A
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
t
Notes:
10. If both byte enables are toggled together this value is 10 ns.
11. t
12. The internal write time of the memory is defined by the overlap of WE, CE = V
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
BW
SD
HD
HZWE
LZWE
8.
9.
Test conditions assume signal transition time of 5 ns or less, timing reference levels of V
specified I
At any given temperature and voltage condition, t
any given device.
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
HZOE
[10]
, t
Parameter
HZCE
OL
, t
/I
OH
HZBE
[12]
and 30-pF load capacitance.
, and t
HZWE
transitions are measured when the outputs enter a high impedance state.
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
BHE / BLE LOW to Data Valid
BHE / BLE LOW to Low Z
BHE / BLE HIGH to High Z
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
BHE / BLE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE LOW to High Z
WE HIGH to Low Z
Over the Operating Range
Description
HZCE
is less than t
[9]
[9]
[9, 11]
[9, 11]
[9]
[9, 11]
LZCE
[9]
[8]
[9, 11]
, t
HZBE
IL
, BHE and/or BLE = V
is less than t
Min
CC(typ.)
55
10
10
55
45
45
45
50
25
5
0
5
0
0
0
5
LZBE
55 ns
/2, input pulse levels of 0 to V
, t
HZOE
IL
Max
. All signals must be ACTIVE to initiate a write and any
55
55
25
20
20
55
55
20
20
is less than t
CY62147CV25/30/33
Min
LZOE
70
10
10
70
60
60
50
60
30
5
0
5
0
0
0
5
, and t
CC(typ.)
70 ns
HZWE
, and output loading of the
Max
70
70
35
25
25
70
70
25
25
is less than t
MoBL™
Page 6 of 14
LZWE
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for

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