XC3190A-4PQ160C Xilinx Inc, XC3190A-4PQ160C Datasheet - Page 57

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XC3190A-4PQ160C

Manufacturer Part Number
XC3190A-4PQ160C
Description
FPGA XC3100A Family 6K Gates 320 Cells 227MHz CMOS Technology 5V 160-Pin PQFP
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC3190A-4PQ160C

Package
160PQFP
Family Name
XC3100A
Device Logic Units
320
Device System Gates
6000
Number Of Registers
928
Maximum Internal Frequency
227 MHz
Typical Operating Supply Voltage
5 V
Maximum Number Of User I/os
138
Ram Bits
64160
Re-programmability Support
Yes
Case
QFP160
Dc
98+

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Part Number:
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XC3100L Switching Characteristics
Xilinx maintains test specifications for each product as controlled documents. To insure the use of the most recently released
device performance parameters, please request a copy of the current test-specification revision.
XC3100L Operating Conditions
Notes:
XC3100L DC Characteristics Over Operating Conditions
Notes:
November 9, 1998 (Version 3.1)
Symbol
Symbol
V
I
V
I
V
I
V
CCPD
CCO
C
V
RLL
V
T
RIN
I
OH
OL
IL
CC
IN
IN
IH
IL
1. At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.3% per C.
2. Although the present (1996) devices operate over the full supply voltage range from 3.0 V to 5.25 V, Xilinx reserves the right
1. With no output current loads, no active input or long line pull-up resistors, all package pins at V
2. Total continuous output sink current may not exceed 100 mA per ground pin. Total continuous output source current may not
3. Not tested. Allows undriven pins to float High. For any other purpose, use an external pull-up.
to restrict operation to the 3.0 and 3.6 V range later, when smaller device geometries might preclude operation @ 5 V.
Operating conditions are guaranteed in the 3.0 – 3.6 V V
configured with a tie option.
exceed 100 mA per V
R
High-level output voltage (@ I
High-level output voltage (@ I
Low-level output voltage (@ I
Low-level output voltage (@ I
Power-down supply voltage (PWRDWN must be Low)
Quiescent FPGA supply current
Chip thresholds programmed as CMOS levels
Input Leakage Current
Input capacitance
(sample tested)
Pad pull-up (when selected) @ V
Horizontal long line pull-up (when selected) @ logic Low
Supply voltage relative to GND Commercial 0 C to +85 C junction
High-level input voltage
Low-level input voltage
Input signal transition time
All pins except XTL1 and XTL2
XTL1 and XTL2
CC
pin. The number of ground pins varies from the XC3142L to the XC3190L.
Description
OH
OH
Description
OH
OH
= 4.0 mA, V
= +100.0 A, V
= -4.0 mA, V
= -100.0 A, V
IN
= 0 V
3
XC3000 Series Field Programmable Gate Arrays
CC
CC
CC
1
range.
CC
min)
CC
min)
min)
min)
V
Min
-0.3
3.0
2.0
CC
2.30
0.02
0.20
Min
2.4
-10
CC
-0.2
or GND, and the FPGA
V
CC
Max
Max
0.40
0.17
2.80
250
+10
3.6
0.8
0.2
1.5
10
15
+ 0.3
Units
Units
mA
mA
mA
pF
pF
ns
V
V
V
V
V
V
V
V
A
7-59
7

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