70V659S12BFI Integrated Device Technology (Idt), 70V659S12BFI Datasheet - Page 12

• Manufacturer Part Number: 70V659S12BFI
• Description: SRAM Chip Async Dual 3.3V 4.5M-Bit 128K x 36 12ns 208-Pin CABGA
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 70V659S12BFI

• Package: 208CABGA
• Timing Type: Asynchronous
• Density: 4.5 Mb
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 17 Bit
• Number Of I/o Lines: 36 Bit
• Number Of Ports: 2
• Number Of Words: 128K

DATA
BUSY
Waveform of Read Cycles
NOTES:
1. Timing depends on which signal is asserted last, OE, CE or BEn.
2. Timing depends on which signal is de-asserted first CE, OE or BEn.
3. t
4. Start of valid data depends on which timing becomes effective last t
5. SEM = V
Timing of Power-Up Power-Down
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
ADDR
has no relation to valid output data.
BDD
BEn
R/W
OUT
OUT
CE
OE
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY
IH
.
CE
I
I
CC
SB
t
t
t
t
t
AA
ACE
AOE
LZ
ABE
(1)
(4)
t
(4)
(4)
PU
(4)
(5)
50%
AOE
t
RC
, t
ACE
, t
t
BDD
12
AA
or t
(3,4)
BDD
.
VALID DATA
t
PD
Industrial and Commercial Temperature Ranges
50%
(4)
4869 drw 07
t
HZ
(2)
t
.
OH
4869 drw 06
.