70V659S12BFI Integrated Device Technology (Idt), 70V659S12BFI Datasheet - Page 14

• Manufacturer Part Number: 70V659S12BFI
• Description: SRAM Chip Async Dual 3.3V 4.5M-Bit 128K x 36 12ns 208-Pin CABGA
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 70V659S12BFI

• Package: 208CABGA
• Timing Type: Asynchronous
• Density: 4.5 Mb
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 17 Bit
• Number Of I/o Lines: 36 Bit
• Number Of Ports: 2
• Number Of Words: 128K

Timing Waveform of Semaphore Read after Write Timing, Either Side
NOTES:
1. CE = V
2. "DATA
Timing Waveform of Semaphore Write Contention
NOTES:
1. D
2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".
3. This parameter is measured from R/W
4. If t
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
SEM/BEn
OR
SPS
= D
OUT
is not satisfied,the semaphore will fall positively to one side or the other, but there is no guarantee which side will be granted the semaphore flag.
IH
A
OL
R/W
for the duration of the above timing (both write and read cycle) (Refer to Chip Enable Truth Table). Refer also to Truth Table II for appropriate BE controls.
0
VALID" represents all I/O's (I/O
I/O
OE
-A
= V
(1)
2
IL
, CE
SIDE
SIDE
L
= CE
(2)
(2)
R
= V
"A"
"B"
IH
. Refer to Truth Table II for appropriate BE controls.
"A"
t
AS
VALID ADDRESS
A
A
or SEM
0
0"A"
0"B"
t
- I/O
AW
SEM
SEM
R/W
R/W
-A
-A
Write Cycle
35
"A"
2"A"
2"B"
) equal to the semaphore value.
"A"
"A"
"B"
"B"
going HIGH to R/W
t
t
WP
EW
DATA
t
IN
DW
t
WR
VALID
t
DH
MATCH
"B"
or SEM
14
t
SWRD
MATCH
"B"
going HIGH.
t
SPS
VALID ADDRESS
t
t
SOP
Read Cycle
SOP
t
SAA
Industrial and Commercial Temperature Ranges
(1,3,4)
t
t
AOE
ACE
DATA
VALID
4869 drw 11
OUT
t
OH
(2)
.
4869 drw 10
(1)