70V659S12BFI Integrated Device Technology (Idt), 70V659S12BFI Datasheet - Page 18

• Manufacturer Part Number: 70V659S12BFI
• Description: SRAM Chip Async Dual 3.3V 4.5M-Bit 128K x 36 12ns 208-Pin CABGA
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 70V659S12BFI

• Package: 208CABGA
• Timing Type: Asynchronous
• Density: 4.5 Mb
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 17 Bit
• Number Of I/o Lines: 36 Bit
• Number Of Ports: 2
• Number Of Words: 128K

Waveform of Interrupt Timing
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. Refer to Interrupt Truth Table.
3. Timing depends on which enable signal (CE or R/W) is asserted last.
4. Timing depends on which enable signal (CE or R/W) is de-asserted first.
Truth Table III — Interrupt Flag
NOTES:
1. Assumes BUSY
2. If BUSY
3. If BUSY
4. INT
5. A
6. A
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
R/W
ADDR
ADDR
X
X
X
L
16
16
x is a NC for IDT70V658, therefore Interrupt Addresses are FFFF and FFFE.
x and A
L
L
INT
R/W
CE
OE
and INT
INT
CE
L
R
"B"
"B"
"B"
"B"
= V
= V
"A"
"A"
"A"
"B"
15
CE
R
IL
x are NC's for IDT70V657, therefore Interrupt Addresses are 7FFF and 7FFE.
X
X
IL
L
L
, then no change.
, then no change.
L
must be initialized at power-up.
L
= BUSY
Left Port
OE
X
X
X
R
L
L
=V
IH
.
A
16L
1FFFE
1FFFF
-A
X
X
0L
(5,6)
t
t
AS
AS
(3)
t
INTERRUPT CLEAR ADDRESS
(3)
t
INS
INR
INT
INTERRUPT SET ADDRESS
H
L
(3)
X
X
(3)
(3)
(2)
L
(1)
R/W
X
X
L
X
(1,4)
R
t
t
WC
RC
18
CE
X
X
L
L
R
Right Port
OE
X
X
X
L
R
(2)
(2)
t
WR
A
16R
Industrial and Commercial Temperature Ranges
1FFFE
1FFFF
(4)
-A
X
X
0R
(5,6)
INT
H
L
X
X
(2)
(3)
R
Set Right INT
Reset Right INT
Set Left INT
Reset Left INT
L
Function
R
Flag
L
Flag
R
Flag
4869 drw 16
4869 drw 17
Flag
4869 tbl 16