MT90869AG Zarlink, MT90869AG Datasheet - Page 36

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MT90869AG

Manufacturer Part Number
MT90869AG
Description
Switch Fabric 16K x 16K/8K x 8K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet

Specifications of MT90869AG

Package
272BGA
Number Of Ports
64
Fabric Size
16K x 16K|8K x 8K
Switch Core
Non-Blocking|Blocking
Port Speed
8.192|4.096|2.048 Mbps
Operating Supply Voltage
1.8|3.3 V

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Part Number
Manufacturer
Quantity
Price
Part Number:
MT90869AG
Manufacturer:
ZARLINK
Quantity:
2 388
Part Number:
MT90869AG2
Manufacturer:
ZARLINK
Quantity:
96
The BCSTo0-3 outputs transmit serial data (channel control bits) at 16.384 Mb/s, with each bit representing the per-
channel high impedance state for specific streams. Four output streams are allocated to each control line as
follows:-
(See also Pin Description)
The Channel Control Bit location, within a frame period, for each channel of the Backplane output streams is
presented in BCSTo Allocation of Channel Control Bits to the Output Streams (32 Mb/s Mode)
The BCSTo0-3 outputs data at a constant data-rate of 16.384Mb/s and all output streams, BSTo0-15, operate at a
data-rate of 32.768 Mb/s.
As an aid to the description, the channel control bit for a single channel on specific streams is presented, with
reference to Table 4:
(1) The Channel Control Bit corresponding to Stream 0, Channel 0, BSTo0_Ch0, is transmitted on BCSTo0 and is
advanced, relative to the Frame Boundary, by six periods (clock period no. 2043) of C16o.
(2) The Channel Control Bit corresponding to Stream 12, Channel 0, BSTo12_Ch0, is transmitted on BCSTo0 in
advance of the Frame Boundary by three periods (clock period no. 2046) of output clock, C16o. Similarly, the
Channel Control Bits for BSTo13_Ch0, BSTo14_Ch0 and BSTo15_Ch0 are advanced relative to the Frame
Boundary by three periods of C16o, on BCSTo1, BCSTo2 and BCSTo3, respectively.
(3) For stream BSTo4 the value of the Channel Control Bit for Channel 510 will be transmitted during the C16o
clock period no. 2036 on BCSTo0.
(4) For stream BSTo5 the value of the Channel Control Bit for Channel 4 will be transmitted during the C16o clock
period no. 12 on BCSTo1.
Figure 15, Backplane Port External High Impedance Control Timing (32 Mb/s Mode) shows the channel control bits
for BCSTo0, BCSTo1, BCSTo2 and BCSTo3.
BCSTo0 outputs the channel control bits for streams BSTo0, 4, 8, and 12.
BCSTo1 outputs the channel control bits for streams BSTo1, 5, 9, and 13.
BCSTo2 outputs the channel control bits for streams BSTo2, 6, 10, and 14.
BCSTo3 outputs the channel control bits for streams BSTo3, 7, 11, and 15.
Table 4 - BCSTo Allocation of Channel Control Bits to the Output Streams (32 Mb/s Mode)
Period
C16o
2039
2040
2041
2042
2043
2044
2045
2046
2047
1
BCSTo0
12
0
12
0
4
8
4
8
0
3-1
3-2
Allocated Stream No.
BCSTo1
13
13
1
5
9
1
5
9
1
3-2
Zarlink Semiconductor Inc.
MT90869
BCSTo2
14
10
14
10
2
6
2
6
2
36
3-2
BCSTo3
15
15
11
11
3
7
3
7
3
3-2
Channel No.
32 Mb/s
Ch 511
Ch 511
Ch 511
Ch 511
Ch 0
Ch 0
Ch 0
Ch 0
Ch 1
2
Data Sheet

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