MT90869AG Zarlink, MT90869AG Datasheet - Page 62

• Manufacturer Part Number: MT90869AG
• Description: Switch Fabric 16K x 16K/8K x 8K 1.8V/3.3V 272-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of MT90869AG

• Package: 272BGA
• Number Of Ports: 64
• Fabric Size: 16K x 16K|8K x 8K
• Switch Core: Non-Blocking|Blocking
• Port Speed: 8.192|4.096|2.048 Mbps
• Operating Supply Voltage: 1.8|3.3 V

13.10
13.10.1
Address 00C3h.
Local BER Start Send Register defines the output channel and the stream in which the BER sequence starts to
be transmitted. The LBSSR register is configured as follows:
13.10.1.1
Address 00C4h
Local BER Transmit Length Register (LTXBLR) defines how many channels the BER sequence will be transmitted
during each frame. The LTXBLR register is configured as follows:
15-8
7-0
Bit
15-13
12-8
Bit
7-0
LTXBL(7:0)
Local Bit Error Rate (BER) Registers
Reserved
Name
Local BER Start Send Register (LBSSR)
Local Transmit BER Length Register (LTXBLR)
LBSCA(7:0)
LBSSA(4:0)
Reserved
Name
Reset
0
0
Table 31 - Local BER Start Send Register (LBSSR) Bits
Table 32 - Local BER Length Register (LTXBLR) Bits
Reserved.
Local Transmit BER Length Bits
The binary value of these bits define the number of channels in addition to the
Start Channel that the BER data will be transmitted on. (i.e., Total Channels =
Start Channel + LTXBL value)
Reset
0
0
0
Reserved.
Local BER Send Stream Address Bits.
The binary value of these bits refers to the local output stream
which carries the BER data.
Local BER Send Channel Address Bits.
The binary value of these bits refers to the local output channel in
which the BER data starts to be sent.
Zarlink Semiconductor Inc.
MT90869
62
Description
Description
Data Sheet