PALCE22V10Z-25SC Lattice, PALCE22V10Z-25SC Datasheet - Page 26

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PALCE22V10Z-25SC

Manufacturer Part Number
PALCE22V10Z-25SC
Description
SPLD PAL® Family 10 Macro Cells 50MHz EECMOS Technology 5V 24-Pin SOIC
Manufacturer
Lattice
Datasheet

Specifications of PALCE22V10Z-25SC

Package
24SOIC
Family Name
PAL®
Number Of Macro Cells
10
Maximum Propagation Delay Time
25 ns
Typical Operating Supply Voltage
5 V
Maximum Internal Frequency
50 MHz
Number Of Product Terms Per Macro
16
Re-programmability Support
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PALCE22V10Z-25SC
Manufacturer:
AMD
Quantity:
20 000
TYPICAL I
V
26
The selected “typical” pattern utilized 50% of the device resources. Half of the macrocells were programmed as registered,
and the other half were programmed as combinatorial. Half of the available product terms were used for each macrocell. On
any vector, half of the outputs were switching.
By utilizing 50% of the device, a midpoint is defined for I
down to estimate the I
CC
I CC (mA)
= 5.0 V, T
CC
150
125
100
75
50
25
A
0
CHARACTERISTICS
= 25°C
0
CC
requirements for a particular design.
10
PALCE22V10 and PALCE22V10Z Families
I CC vs. Frequency
20
CC
., From this midpoint, a designer may scale the I
Frequency (MHz)
30
40
50
22V10H-7
22V10H-10
22V10H-15
22V10H-25
22V10Q-10
22V10Q-25
22V10H-5
CC
graphs up or
16564E-015

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