PALCE22V10Z-25SC Lattice, PALCE22V10Z-25SC Datasheet - Page 33

• Manufacturer Part Number: PALCE22V10Z-25SC
• Description: SPLD PAL® Family 10 Macro Cells 50MHz EECMOS Technology 5V 24-Pin SOIC
• Manufacturer: Lattice

Specifications of PALCE22V10Z-25SC

• Package: 24SOIC
• Family Name: PAL®
• Number Of Macro Cells: 10
• Maximum Propagation Delay Time: 25 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Internal Frequency: 50 MHz
• Number Of Product Terms Per Macro: 16
• Re-programmability Support: Yes

CONNECTION DIAGRAMS
Top View
*For -5, this pin must be grounded for guaranteed data sheet performance. If not grounded, AC timing may degrade
by about 10%.
PIN DESIGNATIONS
CLK
GND = Ground
I
I/O
NC
V
Note:
Pin 1 is marked for orientation.
CC
= Clock
= Input
= Input/Output
= No Connect
= Supply Voltage
CLK/I 0
GND
I 10
I 1
I 2
I 3
I 4
I 5
I 6
I 7
I 8
I 9
SKINNYDIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
16564E-002
PALCE22V10 and PALCE22V10Z Families
V CC
I/O 9
I/O 8
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
I/O 2
I/O 1
I/O 0
I 11
NC
I
I
I
I
I
I
3
4
5
6
7
8
5
6
7
8
9
10
11
12 13 14 15 16 17 18
4
3
2
1
PLCC
28 27 26
25
24
23
22
21
20
19
16564E-003
I/O
I/O
I/O
GND/NC *
I/O
I/O
I/O
7
6
5
4
3
2
33