STM32F407IGT6 STMicroelectronics, STM32F407IGT6 Datasheet - Page 23

• Manufacturer Part Number: STM32F407IGT6
• Description: IC MCU 32BIT 1MB FLASH 176LQFP
• Manufacturer: STMicroelectronics

Specifications of STM32F407IGT6

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 168MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 140
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 24x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Core: ARM Cortex M4
• Processor Series: STM32F4
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 168 MHz
• Data Ram Size: 192 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 140
• Number Of Timers: 10
• Operating Supply Voltage: 1.7 V to 3.6 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, I2C, I2S, SPI, UART
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11604

STM32F405xx, STM32F407xx
a.
V
●
Figure 7.
V
temperature range and PDR_ON is connected to V
DD
DD
/V
minimum value is 1.8 V
There are three low-power modes:
–
–
–
Regulator ON/internal reset OFF
The regulator ON with internal reset OFF mode is not available on LQFP64 package.
On LQFP100 and LQFP144 packages, the internal reset is controlled by setting
PDR_ON pin to V
On UFBGA176 package, the internal regulator must be activated by connecting
BYPASS_REG to V
On LQFP176 packages, the internal reset must be activated by connecting PDR_ON to
V
The NRST pin should be controlled by an external reset controller to keep the device
under reset when V
SS
DDA
.
MR is used in the nominal regulation mode (Run)
LPR is used in the Stop modes
Power-down is used in Standby mode: the regulator output is in high impedance:
the kernel circuitry is powered down, inducing zero consumption (but the contents
of the registers and SRAM are lost).
minimum value of 1.7 V is obtained when the device operates in the 0 to 70 °C
Regulator ON/internal reset OFF
SS
SS,
DD
.
is below 1.8 V (see
and PDR_ON to V
(a)
Doc ID 022152 Rev 1
.
SS
Figure
.
SS
.
7).
Description
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