STM32F407IGT6 STMicroelectronics, STM32F407IGT6 Datasheet - Page 92

IC MCU 32BIT 1MB FLASH 176LQFP

STM32F407IGT6

Manufacturer Part Number
STM32F407IGT6
Description
IC MCU 32BIT 1MB FLASH 176LQFP
Manufacturer
STMicroelectronics
Datasheets

Specifications of STM32F407IGT6

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
168MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
140
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
140
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, I2C, I2S, SPI, UART
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11604

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Electrical characteristics
5.3.17
92/154
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 46.
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
Figure 29. Recommended NRST pin protection
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the V
V
V
V
T
V
V
Table
NF(NRST)
IH(NRST)
IL(NRST)
NRST_OUT
Symbol
F(NRST)
hys(NRST)
to the series resistance must be minimum
Table
R
PU
46. Otherwise the reset is not taken into account by the device.
10.
(1)
(1)
(1)
(1)
PU
NRST pin characteristics
(see
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
Generated reset pulse duration
Table
43).
Parameter
Doc ID 022152 Rev 1
(~10% order)
(2)
.
Reset source
V
Conditions
DD
V
DD
Internal
IN
> 2.7 V
supply voltage conditions summarized
=
Table 46
V
SS
STM32F405xx, STM32F407xx
are derived from tests
IL(NRST)
–0.5
Min
300
30
20
2
-
-
max level specified in
Typ
200
40
-
-
-
-
-
V
DD
Max
100
0.8
50
-
-
-
+0.5
Unit
mV
ns
ns
µs
V

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