LSM303DLHC STMicroelectronics, LSM303DLHC Datasheet
LSM303DLHC
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LSM303DLHC Summary of contents
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... Thresholds and timing of interrupt generators are programmable by the end user on the fly. Magnetic and accelerometer parts can be enabled or put into power-down mode separately. The LSM303DLHC is available in a plastic land grid array package (LGA) and is guaranteed to operate over an extended temperature range from -40 °C to +85 °C. ...
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... Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 High current wiring effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1.1 5.1.2 5.1.3 6 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/42 2 Sensor inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Linear acceleration sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Zero-g level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Linear acceleration digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Magnetic field digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 018771 Rev 1 LSM303DLHC ...
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... LSM303DLHC 7 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1 Linear acceleration register description . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.1.1 7.1.2 7.1.3 7.1.4 7.1.5 7.1.6 7.1.7 7.1.8 7.1.9 7.1.10 7.1.11 7.1.12 7.1.13 7.1.14 7.1.15 7.1.16 7.1.17 7.1.18 7.1.19 7.1.20 7.1.21 7.1.22 7.1.23 7.1.24 7.1.25 7.1.26 7.1.27 7.2 Magnetic field sensing register description . . . . . . . . . . . . . . . . . . . . . . . 36 7 ...
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... Contents 7.2.8 7.2.9 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 4/42 IR_REG_M (0Ah/0Bh/0Ch TEMP_OUT_H_M (31h), TEMP_OUT_L_M (32h Doc ID 018771 Rev 1 LSM303DLHC ...
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... LSM303DLHC List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3. Sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2 Table slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 8. Accelerometer operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 9. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 10. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 11 ...
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... Table 74. CRA_REG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 75. Gain setting Table 76. MR_REG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 77. MR_REG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 79. SR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 80. SR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 81. IRA_REG_M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 82. IRB_REG_M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 83. IRC_REG_M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 84. TEMP_OUT_H_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 85. TEMP_OUT_L_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 86. TEMP_OUT resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 87. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6/42 Doc ID 018771 Rev 1 LSM303DLHC ...
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... LSM303DLHC 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram Sensing Block ( ( INTERRUPT GEN. A/D Sensing Interface converter CHARGE AMPLIFIER + MUX - CHARGE AMPLIFIER + MUX - TRIMMING REFERENCE CIRCUITS BUILT-IN OFFSET SET/RESET FIFO CIRCUITS CIRCUITS Doc ID 018771 Rev 1 Block diagram and pin description ...
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... Reserved capacitor connection (C1) GND Reserved DRDY Reserved Reserved SETP S/R capacitor connection (C2) SETC S/R capacitor connection (C2) Vdd Doc ID 018771 Rev 1 LSM303DLHC 1 13 BOTTOM VIEW Function Power supply for I/O pins 2 C serial clock (SCL serial data (SDA) Inertial Interrupt 2 Inertial Interrupt 1 ...
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... LSM303DLHC 2 Module specifications 2.1 Sensor characteristics @ Vdd = 2 °C unless otherwise noted Table 3. Sensor characteristics Symbol Parameter Linear acceleration LA_FS measurement range M_FS Magnetic measurement range LA_So Linear acceleration sensitivity M_GN Magnetic gain setting a. The product is factory calibrated at 2.5 V. The operational power supply range is from 2. 3.6 V. ...
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... ODR bit mode(Table set to 1001 Cross field =.0.5 gauss H applied = ±3 gauss No permitting effect on zero reading Sensitivity starts to degrade. Use S/R pulse to restore sensitivity . . (b) Test condition - 72. Doc ID 018771 Rev 1 LSM303DLHC (1) Min. Typ. Max. ±0.01 ±60 ±0.5 220 2 ±1 10000 20 -40 +85 . (1) Min ...
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... LSM303DLHC 2.3 Electrical characteristics @ Vdd = 2 °C unless otherwise noted. Table 5. Electrical characteristics Symbol Parameter Vdd Supply voltage Vdd_IO Module power supply for I/O Current consumption in normal Idd mode Current consumption in IddSL sleep-mode Top Operating temperature range 1. Typical specifications are not guaranteed 2 ...
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... C standard mode Min. Max. 0 100 4.7 4.0 250 0.01 3.45 1000 300 4 4.7 4 4.7 ( su(SDA) h(SDA r(SCL) f(SCL) Doc ID 018771 Rev 1 LSM303DLHC 2 ( fast mode Unit Min. Max. 0 400 KHz 1.3 µs 0.6 100 ns 0.01 0.9 µs ( 0.1C 300 0.1C 300 b 0 ...
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... LSM303DLHC 2.5 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability ...
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... Offset changes little over temperature, see “Zero-g level change vs. temperature”. The Zero-g level tolerance (TyOff) describes the standard deviation of the range of Zero-g levels of a population of sensors. 14/42 Doc ID 018771 Rev 1 LSM303DLHC ...
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... IC interfaces are realized using a CMOS technology that allows to design a dedicated circuit which is trimmed to better match the sensing element characteristics. The LSM303DLHC features two data-ready signals (RDY) which indicate when a new set of measured acceleration data and magnetic data are available, therefore simplifying data synchronization in the digital system that uses the device ...
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... Application hints 4 Application hints Figure 4. LSM303DLHC electrical connection TOP VIEW TOP VIEW 4.1 capacitors The C1 and C2 external capacitors should be low SR value ceramic type constructions (typ. suggested value 200 mOhm). Reservoir capacitor C1 is nominally 4.7 µF in capacitance, with the set/reset capacitor C2 nominally 0.22 µF in capacitance. ...
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... LSM303DLHC 4.3 Digital interface power supply This digital interface, dedicated to the linear acceleration and to the magnetic field signal, is capable of operating with a standard power supply (Vdd) or using a dedicated power supply (Vdd_IO). 4.4 Soldering information The LGA package is compliant with the ECOPACK It is qualified for soldering heat resistance according to JEDEC J-STD-020. ...
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... Digital interfaces 5 Digital interfaces The registers embedded inside the LSM303DLHC are accessible through two separate I serial interfaces, one for the accelerometer core and one for the magnetometer core. Table 9. Serial interface pin description PIN Name SCL SDA 2 5 serial interface The LSM303DLHC I registers whon also be read back ...
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... The I C embedded inside the LSM303DLHC behaves like a slave device and the following protocol must be adhered to. After the start condition (ST) a slave address is sent, once a slave acknowledge (SAK) has been returned, an 8-bit sub-address (SUB) is transmitted; the 7 LSBs represent the actual register address while the MSB enables address auto- increment. If the MSB of the SUB field is ‘ ...
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... Transfer when master is receiving (reading) multiple bytes of data from slave SAD Master ST +W Slave SAK 20/42 SAD[7:1] 0011001 0011001 SAD SUB SR +R SAK SAK DATA Doc ID 018771 Rev 1 LSM303DLHC Table 14 explains how the R/W SAD+R/W 1 00110011 (33h) 0 00110010 (32h) MAK MAK NMAK SP DATA DATA ...
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... Read/Write identifier. To minimize the communication between the master and magnetic digital interface of LSM303DLHC, the address pointer updates automatically without master intervention. This automatic address pointer update has two additional features. First, when address 12 or higher is accessed, the pointer updates to address 00, and secondly, when address 08 is reached, the pointer rolls back to address 03 ...
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... Doc ID 018771 Rev 1 LSM303DLHC Default Comment Binary -- -- Reserved 010 0000 00000111 010 0001 00000000 010 0010 00000000 010 0011 00000000 010 0100 00000000 010 0101 00000000 010 0110 00000000 010 0111 00000000 010 1000 output 010 1001 output 010 1010 output ...
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... LSM303DLHC Table 17. Register address map (continued) Name address Table 14 TIME_LATENCY_A Table 14 TIME_WINDOW_A Table 14 Reserved (do not modify) Table 16 CRA_REG_M Table 16 CRB_REG_M Table 16 MR_REG_M Table 16 OUT_X_H_M Table 16 OUT_X_L_M Table 16 OUT_Z_H_M Table 16 OUT_Z_L_M Table 16 OUT_Y_H_M Table 16 OUT_Y_L_M Table 16 SR_REG_Mg Table 16 IRA_REG_M Table 16 IRB_REG_M Table 16 ...
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... Normal / low-power mode (1 Hz Normal / low-power mode (10 Hz Normal / low-power mode (25 Hz Normal / low-power mode (50 Hz Normal / low-power mode (100 Hz Normal / low-power mode (200 Hz Normal / low-power mode (400 Hz) Doc ID 018771 Rev 1 LSM303DLHC Zen Yen 20.) Table 20 all frequencies Power mode selection Xen ...
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... LSM303DLHC Table 20. Data rate configuration (continued) ODR3 ODR2 7.1.2 CTRL_REG2_A (21h) Table 21. CTRL_REG2_A register HPM1 HPM0 Table 22. CTRL_REG2_A description HPM1 -HPM0 High pass filter mode selection. Default value: 00 (refer to HPCF2 - High pass filter cut-off frequency selection HPCF1 Filtered data selection. Default value: 0 ...
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... Full-scale selection. Default value: 00 (00: +/- 2G, 01: +/- 4G, 10: +/- 8G, 11: +/- 16G) High resolution output mode: Default value: 0 (0: high resolution disable, 1: high resolution enable) SPI serial interface mode selection. Default value: 0 (0: 4-wire interface, 1: 3-wire interface LIR_INT1 D4D_INT1 Doc ID 018771 Rev 1 LSM303DLHC (1) ( LIR_INT2 D4D_INT2 SIM ...
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... LSM303DLHC Table 29. CTRL_REG5_A description BOOT FIFO_EN LIR_INT1 D4D_INT1 LIR_INT2 D4D_INT2 7.1.6 CTRL_REG6_A (25h) Table 30. CTRL_REG6_A register I2_CLICKen Table 31. CTRL_REG6_A description I2_CLICKen I2_INT1 I2_INT2 BOOT_I1 P2_ACT H_LACTIVE 7.1.7 REFERENCE/DATACAPTURE_A (26h) Table 32. REFERENCE_A register Ref7 Ref6 Reboot memory content. Default value: 0 (0: normal mode, 1: reboot memory content) FIFO enable ...
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... Y-axis acceleration data. The value is expressed in 2’s complement. 7.1.11 OUT_Z_L_A (2Ch), OUT_Z_H_A (2Dh) Z-axis acceleration data. The value is expressed in 2’s complement. 28/42 Reference value for interrupt generation. Default value: 0 YOR XOR ZYXDA Doc ID 018771 Rev 1 LSM303DLHC ZDA YDA XDA ...
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... LSM303DLHC 7.1.12 FIFO_CTRL_REG_A (2Eh) Table 36. REFERENCE_A register FM1 FM0 Table 37. REFERENCE_A register description FM1-FM0 FIFO mode selection. Default value: 00 (see TR Trigger selection. Default value trigger event linked to trigger signal on INT1 1: trigger event linked to trigger signal on INT2 FTH4:0 Default value: 0 Table 38. ...
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... Z high event has occurred) Z low. Default value (0: no interrupt low event has occurred) Y high. Default value (0: no interrupt high event has occurred) 30/42 Interrupt mode OR combination of interrupt events 6-direction movement recognition AND combination of interrupt events 6-direction position recognition ZH ZL Doc ID 018771 Rev 1 LSM303DLHC ...
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... LSM303DLHC Table 44. INT1_SRC_A description (continued) Y low. Default value (0: no interrupt low event has occurred) X high. Default value (0: no interrupt high event has occurred) X low. Default value (0: no interrupt low event has occurred) Interrupt 1 source register. Read only register. Reading at this address clears the INT1_SRC IA bit (and the interrupt signal on the INT 1 pin) and allows the refreshing of data in the INT1_SRC register if the latched option was chosen ...
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... The interrupt signal stays until orientation is inside the zone. 7.1.19 INT2_SRC_A (35h) Table 52. INT2_SRC_A register ( This bit must be set to ‘0’ for correct working of the device. 32/42 Table 51) Interrupt mode OR combination of interrupt events 6-direction movement recognition AND combination of interrupt events 6-direction position recognition ZH ZL Doc ID 018771 Rev 1 LSM303DLHC Table 51 ...
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... LSM303DLHC Table 53. INT2_SRC_A description Interrupt active. Default value (0: no interrupt has been generated, 1: one or more interrupts have been generated) Z high. Default value (0: no interrupt high event has occurred) Z low. Default value (0: no interrupt low event has occurred) Y high. Default value (0: no interrupt high event has occurred) Y low ...
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... Enable interrupt single CLICK on X axis. Default value: 0 (0: disable interrupt request, 1: enable interrupt request on measured accel. value higher than preset threshold) DCLICK SCLICK Sign Doc ID 018771 Rev 1 LSM303DLHC ...
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... LSM303DLHC Table 61. CLICK_SRC_A description (continued CLICK-CLICK detection. Default value: 0 (0: no interrupt high event has occurred CLICK-CLICK detection. Default value: 0 (0: no interrupt high event has occurred CLICK-CLICK detection. Default value: 0 (0: no interrupt high event has occurred) 7.1.24 CLICK_THS_A (3Ah) Table 62. CLICK_THS_A register ...
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... DO2 to DO0 output registers (refer to Table 72. Data rate configurations DO2 36/42 TW5 TW4 TW3 CLICK-CLICK time window (1) 0 DO2 Table 72). Default value: 100 DO1 DO0 Doc ID 018771 Rev 1 LSM303DLHC TW2 TW1 (1) DO1 DO0 0 Minimum data output rate (Hz) 0.75 1.5 3.0 7 TW0 (1) 0 ...
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... LSM303DLHC Table 72. Data rate configurations (continued) DO2 1 1 7.2.2 CRB_REG_M (01h) Table 73. CRA_REG register GN2 GN1 1. This bit must be set to ‘0’ for correct working of the device. Table 74. CRA_REG description Gain configuration bits. The gain configuration is common for all channels (refer to ...
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... Sleep-mode. Device is placed in sleep-mode -- -- Data output register lock. Once a new set of measurements is available, this bit is set when the first magnetic file data register has been read. Data ready bit. This bit is when a new set of measurements are available Doc ID 018771 Rev 1 LSM303DLHC Mode -- -- LOCK ...
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... LSM303DLHC 7.2.9 TEMP_OUT_H_M (31h), TEMP_OUT_L_M (32h) Table 84. TEMP_OUT_H_M register TEMP11 TEMP10 Table 85. TEMP_OUT_L_M register TEMP3 TEMP2 Table 86. TEMP_OUT resolution TEMP11-0 TEMP9 TEMP8 TEMP7 TEMP1 TEMP0 -- Temperature data (8LSB/deg - 12-bit resolution). The value is expressed as . 2’s complement Doc ID 018771 Rev 1 Register description ...
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... LGA-14: mechanical data and package dimensions R ef. Min 0.16 D1 2. 40/42 Dimens ions mm Typ. Max. 1 0.785 0.2 0.24 3 3.15 5 5.15 0.8 4 0.8 0.5 0.1 0.05 Doc ID 018771 Rev 1 LSM303DLHC Outline and mec hanic al data LGA 3x5x1 14L Land Grid Array Package 8265271_A ...
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... LSM303DLHC 9 Revision history Table 87. Document revision history Date 21-Apr-2011 Revision 1 Initial release. Doc ID 018771 Rev 1 Revision history Changes 41/42 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 42/42 Please Read Carefully: © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 018771 Rev 1 LSM303DLHC ...