SI3018-F-GSR Silicon Laboratories Inc, SI3018-F-GSR Datasheet - Page 11
![](/photos/31/27/312732/16pin_soic_n_sml.jpg)
SI3018-F-GSR
Manufacturer Part Number
SI3018-F-GSR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3018-F-GSR.pdf
(111 pages)
Specifications of SI3018-F-GSR
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Table 7. Switching Characteristics—Serial Peripheral Interface
(V
Parameter*
Cycle Time SCLK
Rise Time, SCLK
Fall Time, SCLK
Delay Time, SCLK Fall to SDO Active
Delay Time, SCLK Fall to SDO
Transition
Delay Time, CS Rise to SDO Tri-state
Setup Time, CS to SCLK Fall
Hold Time, SCLK to CS Rise
Setup Time, SDI to SCLK Rise
Hold Time, SCLK Rise to SDI Transition
Delay time between chip selects
Propagation Delay, SDI to SDITHRU
*Note: All timing (except Rise and Fall time) is referenced to the 50% level of the waveform. Input test levels are
IO
SCLK
=
SDO
3.0 to 3.6 V, T
SDI
CS
V
IH
= V
D
– 0.4 V, V
A
=
0 to 70 °C for K-Grade, C
t
su1
IL
t
=
d1
0.4 V. Rise and Fall times are referenced to the 20% and 80% levels of the waveform.
t
r
Figure 3. SPI Timing Diagram
L
=
20 pF)
Symbol
Rev. 1.31
t
t
t
t
t
t
t
t
su1
su2
t
su2
t
t
d1
d2
d3
h1
h2
cs
t
c
r
f
t
c
t
d2
Conditions
t
h2
Test
Si3050 + Si3018/19
61.03
Min
220
25
20
25
20
—
—
—
—
—
—
t
f
Typ
—
—
—
—
—
—
—
—
—
—
—
6
t
h1
Max
—
25
25
20
20
20
—
—
—
—
—
—
t
cs
t
d3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11
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