ATTINY261A-MU Atmel, ATTINY261A-MU Datasheet - Page 83

• Manufacturer Part Number: ATTINY261A-MU
• Description: NO NEW DESIGNS, USE TINY261A-XU - 20MHZ, QFN/MLF,IND TEMP, G
• Manufacturer: Atmel

11.10.2
11.10.3
8197B–AVR–01/10
TCCR0B – Timer/Counter0 Control Register B
TCNT0L – Timer/Counter0 Register Low Byte
• Bit 4 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR0 bit is kept, hence keeping the Prescaler Reset signal asserted.
This ensures that the Timer/Counter is halted and can be configured without the risk of advanc-
ing during configuration. When the TSM bit is written to zero, the PSR0 bit is cleared by
hardware, and the Timer/Counter start counting.
• Bit 3 – PSR0: Prescaler Reset Timer/Counter0
When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared
immediately by hardware, except if the TSM bit is set.
• Bits 2, 1, 0 – CS02, CS01, CS00: Clock Select0, Bit 2, 1, and 0
The Clock Select0 bits 2, 1, and 0 define the prescaling source of Timer0.
Table 11-4.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter0 Register Low Byte, TCNT0L, gives direct access, both for read and write
operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT0L Register blocks (dis-
ables) the Compare Match on the following timer clock. Modifying the counter (TCNT0L) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0L and the
OCR0x Registers. In 16-bit mode the TCNT0L register contains the lower part of the 16-bit
Timer/Counter0 Register.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
0x32 (0x52)
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
Clock Select Bit Description
R
7
0
-
R/W
7
0
CS00
0
1
0
1
0
1
0
1
R
0
6
-
R/W
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R
5
0
R/W
-
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
5
0
TSM
R/W
R/W
4
0
4
0
TCNT0L[7:0]
PSR0
R/W
R/W
3
0
3
0
CS02
R/W
R/W
2
0
2
0
CS01
R/W
R/W
1
0
1
0
CS01
R/W
R/W
0
0
0
0
TCNT0L
TCCR0B
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