KMPC8548EVTAUJC Freescale Semiconductor, KMPC8548EVTAUJC Datasheet - Page 46

• Manufacturer Part Number: KMPC8548EVTAUJC
• Manufacturer: Freescale Semiconductor

Specifications of KMPC8548EVTAUJC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Local Bus
46
Local bus clock to address valid for LAD
Local bus clock to LALE assertion
Output hold from local bus clock (except LAD/LDP and LALE)
Output hold from local bus clock for LAD/LDP
Local bus clock to output high Impedance (except LAD/LDP and LALE)
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to local bus clock for PLL bypass mode. Timings may be negative with respect to the local bus
3. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[n]. Skew measured between
4. All signals are measured from BV
5. Input timings are measured at the pin.
6. The value of t
7. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
8. Guaranteed by characterization.
9. Guaranteed by design.
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one (1). Also, t
the output (O) going invalid (X) or output hold time.
clock because the actual launch and capture of signals is done with the internal launch/capture clock, which precedes LCLK
by t
complementary signals at BV
in question for 3.3-V signaling levels.
through the component pin is less than or equal to the leakage current specification.
LBKHKT
.
(first two letters of functional block)(reference)(state)(signal)(state)
LBOTOT
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
Table 42. Local Bus Timing Parameters—PLL Bypassed (continued)
LBKHOX
is the measurement of the minimum time between the negation of LALE and any change in LAD.
Parameter
symbolizes local bus timing (LB) for the t
DD
/2.
DD
/2 of the rising edge of local bus clock for PLL bypass mode to 0.4 × BV
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
LBK
LBK
Symbol
t
t
t
t
t
t
LBKLOV3
LBKLOV4
LBKLOX1
LBKLOX2
LBKLOZ1
LBKLOZ2
clock reference (K) to go high (H), with respect to
clock reference (K) goes high (H), in this case for
1
–3.7
–3.7
Min
—
—
—
—
LBIXKH1
Max
0.2
0.2
—
—
0
0
Freescale Semiconductor
symbolizes local bus
Unit
DD
ns
ns
ns
ns
ns
ns
of the signal
Notes
for
4
4
4
4
7
7