KMPC8548EVTAUJC Freescale Semiconductor, KMPC8548EVTAUJC Datasheet - Page 83

• Manufacturer Part Number: KMPC8548EVTAUJC
• Manufacturer: Freescale Semiconductor

Specifications of KMPC8548EVTAUJC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

components are included in this requirement. The reference impedance for return loss measurements is
100-Ω resistive for differential return loss and 25-Ω resistive for common mode.
Freescale Semiconductor
Differential input voltage
Deterministic jitter tolerance
Combined deterministic and random
jitter tolerance
Total jitter tolerance
Multiple input skew
Bit error rate
Unit interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter, and single frequency sinusoidal jitter. The
Differential input voltage
Deterministic jitter tolerance
Combined deterministic and random
jitter tolerance
Total jitter tolerance
Multiple input skew
Bit error rate
Unit interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter, and single frequency sinusoidal jitter. The
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk, and other variable system effects.
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk, and other variable system effects.
Characteristic
Characteristic
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
1
1
Table 62. Receiver AC Timing Specifications—1.25 GBaud
Table 63. Receiver AC Timing Specifications—2.5 GBaud
Symbol
Symbol
BER
BER
J
S
J
S
V
V
J
J
J
UI
J
UI
DR
DR
IN
MI
IN
MI
D
T
D
T
0.37
0.55
0.65
0.37
0.55
0.65
Min
800
Min
400
200
200
—
—
—
—
Range
Range
10
10
1600
1600
Max
Max
800
400
24
24
—
—
—
—
—
—
–12
–12
mVp-p
mVp-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
Unit
Unit
ns
—
ps
ns
ps
Figure
Figure
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
of a multilane link
±100 ppm
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
of a multilane link
±100 ppm
Skew at the receiver input between lanes
Skew at the receiver input between lanes
53. The sinusoidal jitter component
53. The sinusoidal jitter component
Notes
Notes
—
—
Serial RapidIO
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