DS2174Q+ Maxim Integrated Products, DS2174Q+ Datasheet - Page 22

IC BERT ENHANCED 44-PLCC

DS2174Q+

Manufacturer Part Number
DS2174Q+
Description
IC BERT ENHANCED 44-PLCC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2174Q+

Function
Enhanced Bit Error Rate Tester (EBERT)
Interface
E1, J1, T1
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
Error Counter, Pattern Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
6.2 Data Interface
Figure 6-3. Transmit Interface Timing
Table 6-C. TRANSMIT DATA TIMING
(V
for DS2174QN)
TCLK Clock Period (Nibble/Byte Mode)
TCLK High Time (Nibble/Byte Mode)
TCLK Low Time (Nibble/Byte Mode)
TCLK Clock Period (Bit Mode)
TCLK High Time (Bit Mode)
TCLK Low Time (Bit Mode)
TCLK_EN Setup Time Before TCLK­
TCLK_EN Hold Time After TCLK­
TCLKO Output Delay After TCLK­
TCLKO High Time (Nibble/Byte Mode)
TCLKO High Time (Bit Mode)
TDAT Output Delay After TCLKO¯
NOTES:
1) 20pF load.
2) TDAT follows falling edge of TCLKO if CR4.5 = 0, rising edge if CR4.5 = 1.
3) Guaranteed by design.
DD
TCLK_EN
= 3.0V to 3.6V, T
TCLK
TCLKO
TDAT
PARAMETER
DATA OUT
A
t
= 0
PWH(1)
°
C to +70°C for DS2174Q; V
t
t
PWH
OD
t
CYC
t
OD(1)
t
PWL
t
SU
SYMBOL
t
t
t
PWH(1)
PWH(1)
t
t
t
t
t
t
OD(1)
t
PWH
PWH
t
CYC
PWL
CYC
PWL
t
OD
SU
H
22 of 24
t
H
MIN
12.5
6.45
5.0
5.0
2.0
2.0
2.5
2.5
5.0
2.0
DD
= 3.0V to 3.6V, T
½ t
½ t
½ t
½ t
TYP
CYC
CYC
CYC
CYC
GAPPED CLOCK
GAPPED CLOCK
MAX
6.0
5.0
A
= -40°C to +85°C
UNITS NOTES
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1, 3
1, 2
3
3
3
1
1

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