SC16C650BIBS,151 NXP Semiconductors, SC16C650BIBS,151 Datasheet - Page 8
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SC16C650BIBS,151
Manufacturer Part Number
SC16C650BIBS,151
Description
IC UART SINGLE W/FIFO 32-HVQFN
Manufacturer
NXP Semiconductors
Type
IrDAr
Datasheet
1.SC16C650BIBS151.pdf
(48 pages)
Specifications of SC16C650BIBS,151
Number Of Channels
1, UART
Package / Case
32-VFQFN Exposed Pad
Fifo's
32 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
3 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
4.5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3275
935276404151
SC16C650BIBS-S
935276404151
SC16C650BIBS-S
NXP Semiconductors
Table 2.
[1]
[2]
6. Functional description
SC16C650B_4
Product data sheet
Symbol
XTAL1
XTAL2
n.c.
HVQFN32 package die supply ground is connected to both GND pin and exposed center pad. GND pin must be connected to supply
ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
In Sleep mode, XTAL2 is left floating.
[2]
Pin description
Pin
PLCC44 LQFP48 HVQFN32
18
19
1, 12, 23,
34
14
15
1, 6, 13,
21, 25,
36, 37,
48
The SC16C650B provides serial asynchronous receive data synchronization,
parallel-to-serial and serial-to-parallel data conversions for both the transmitter and
receiver sections. These functions are necessary for converting the serial data stream into
parallel data that is required with digital data systems. Synchronization for the serial data
stream is accomplished by adding start and stop bits to the transmit data to form a data
character (character orientated protocol). Data integrity is insured by attaching a parity bit
to the data character. The parity bit is checked by the receiver for any transmission bit
errors. The SC16C650B is fabricated with an advanced CMOS process to achieve low
drain power and high speed requirements.
The SC16C650B is an upward solution that provides 32 bytes of transmit and receive
FIFO memory, instead of none in the 16C450, or 16 bytes in the 16C550. The
SC16C650B is designed to work with high speed modems and shared network
environments that require fast data processing time. Increased performance is realized in
the SC16C650B by the larger transmit and receive FIFOs. This allows the external
processor to handle more networking tasks within a given time. In addition, the four
selectable levels of FIFO trigger interrupt and automatic hardware/software flow control is
uniquely provided for maximum data throughput performance, especially when operating
in a multi-channel environment. The combination of the above greatly reduces the
bandwidth requirement of the external controlling CPU, increases performance, and
reduces power consumption.
The SC16C650B is capable of operation up to 3 Mbit/s with a 48 MHz external clock input
(at 5 V).
The rich feature set of the SC16C650B is available through internal registers. Automatic
hardware/software flow control, selectable transmit and receive FIFO trigger level,
selectable TX and RX baud rates, modem interface controls, and a Sleep mode are some
of these features.
…continued
9
10
12
Type
I
O
-
Rev. 04 — 14 September 2009
Description
Crystal connection or external clock input.
Crystal connection or the inversion of XTAL1 if XTAL1 is
driven.
not connected
UART with 32-byte FIFOs and IrDA encoder/decoder
SC16C650B
© NXP B.V. 2009. All rights reserved.
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