SC28L202A1DGG,112 NXP Semiconductors, SC28L202A1DGG,112 Datasheet

IC UART DUAL W/FIFO 56-TSSOP

SC28L202A1DGG,112

Manufacturer Part Number
SC28L202A1DGG,112
Description
IC UART DUAL W/FIFO 56-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L202A1DGG,112

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935276109112
SC28L202A1DGG
SC28L202A1DGG
Product data sheet
Supersedes data of 2004 Apr 16
SC28L202
Dual universal asynchronous
receiver/transmitter (DUART)
INTEGRATED CIRCUITS
2005 Nov 01

Related parts for SC28L202A1DGG,112

SC28L202A1DGG,112 Summary of contents

Page 1

SC28L202 Dual universal asynchronous receiver/transmitter (DUART) Product data sheet Supersedes data of 2004 Apr 16 INTEGRATED CIRCUITS 2005 Nov 01 ...

Page 2

Philips Semiconductors Dual universal asynchronous receiver/transmitter (DUART) DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Philips Semiconductors Dual universal asynchronous receiver/transmitter (DUART) MR3 – Mode Register 3, A and ...

Page 4

Philips Semiconductors Dual universal asynchronous receiver/transmitter (DUART) Registers of the Arbitrating Interrupt System and Bidding control ICR – Interrupt Control Register . . . . . . . . . . . . . . . . . . . ...

Page 5

Philips Semiconductors Dual universal asynchronous receiver/transmitter (DUART) ISR – Interrupt Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 6

Philips Semiconductors Dual universal asynchronous receiver/transmitter (DUART) LIST OF FIGURES Figure 1. 80xxx TSSOP56 . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 7

Philips Semiconductors Dual UART DESCRIPTION The 28L202 is a high performance dual UART. Its functional and programming features closely match but greatly extend those of previous Philips dual channel UARTs. Its configuration on power up is similar that of the ...

Page 8

Philips Semiconductors Dual UART ORDERING INFORMATION Package Type n mber Type number Name Description Industrial +3 SC28L202A1DGG TSSOP56 plastic thin shrink small outline package; 56 leads; body width 6.1 mm PIN CONFIGURATIONS V ...

Page 9

Philips Semiconductors Dual UART PIN CONFIGURATION FOR 80XXX BUS INTERFACE (INTEL) (see Figure 1) Pin Symbol Pin no. Name and Function type I Bus Configuration: When HIGH, configures the bus interface to the Conditions shown in this table. ...

Page 10

Philips Semiconductors Dual UART CONFIGURATION FOR 68XXX BUS INTERFACE (MOTOROLA) (see Figure 2) Pin Symbol Pin no. Name and Function type I Bus Configuration: When LOW configures the bus interface to the Conditions shown in this table. D0–D7 ...

Page 11

Philips Semiconductors Dual UART OVERALL DESCRIPTION The SC28L202 is composed of several functional blocks. They are listed in the approximate order of hierarchy as seen from the pins of the device. Bus interface. 68K or x86 format Timing Circuits I/O ...

Page 12

Philips Semiconductors Dual UART processor. The advantageous feature of this system is the presentation of the context of the interrupt presented in both a current interrupt register and in the interrupt vector. The context of the interrupt shows ...

Page 13

Philips Semiconductors Dual UART interrupt parameters and for writing to and reading from FIFOs without explicitly addressing them. The CIR will load with 0x00 if IACKN or Update CIR is asserted when the arbitration circuit is NOT asserting an interrupt. ...

Page 14

Philips Semiconductors Dual UART I/O Ports Eight I/O ports are ‘loosely’ provided for each channel. They may be programmed to be inputs or outputs. The input circuits are always active whether programmed as and input or an output. In general ...

Page 15

Philips Semiconductors Dual UART encodes the number of empty positions for presentation to the interrupt arbitration system. The encoding value is the number of empty positions. Thus, an empty TxFIFO will bid with the value or 255; when full it ...

Page 16

Philips Semiconductors Dual UART the receiver operates new start bit had been detected. It then continues assembling the next character. The error conditions of parity error, framing error, and overrun error (if any) are written to the ...

Page 17

Philips Semiconductors Dual UART In the ‘block’ mode (on entry) the status provided in the SR for these three bits is the logical OR of the status for all characters coming to the input of the RxFIFO since the last ...

Page 18

Philips Semiconductors Dual UART The several automatic controls. These modes are concerned with the recognition of the address character itself MR3 [1: Auto wake. Enable receiver on address recognition for this station. Upon recognition of its assigned address ...

Page 19

Philips Semiconductors Dual UART The interrupt sources for each channel are listed below. Receiver without error Receiver with error for each channel Receiver Watch Dog Time-out Event Transmitter Change in break received status per channel Rx loop back error Change ...

Page 20

Philips Semiconductors Dual UART Table 1. Interrupt Values Type Bit 11:4 Receiver w/o error RxFIFO filled Byte Count Receiver w/ error RxFIFO filled Byte Count Receiver Watch-dog RxFIFO filled Byte Count Transmitter TxFIFO empty Byte Count Change of Break Programmed ...

Page 21

Philips Semiconductors Dual UART Global Registers The ‘Global Registers’ all, are driven by the interrupt system. They are defined by the content of the CIR (Current Interrupt Register result of an interrupt arbitration. In other words ...

Page 22

Philips Semiconductors Dual UART The modes of control are described in MR3[3: Host mode 01 = Auto transmit 10 = Auto Receive 11 = Auto receive and transmit Mode control Xon/Xoff mode control is accomplished via the MR3[3:2]. ...

Page 23

Philips Semiconductors Dual UART last character sent the Xon/Xoff logic would not automatically send the negating Xon. The kill CRTX command (of the command register) can be used to cleanly terminate any pending CRTX commands. NOTE case will ...

Page 24

Philips Semiconductors Dual UART REGISTER DESCRIPTION AND PROGRAMMING NOTE Programmers may use either of two register sets or mix the features of each suggested that only the extended register set be used in new designs. However if a ...

Page 25

Philips Semiconductors Dual UART SFSR A and B Special Feature & Status Register Bit 7 Bit 6 Bit 5 Reserved Reserved Reserved SFSR(7:4) Reserved SFSR(3) Status of loop back error check. A ‘1’ indicates a loop back error occurred, which ...

Page 26

Philips Semiconductors Dual UART UART Registers These registers are generally concerned with formatting, transmitting and receiving data. The user must exercise caution when changing the mode of running receivers, transmitters, PBRG or counter/timers. The selected mode will be activated immediately ...

Page 27

Philips Semiconductors Dual UART MR1 – Mode Register 1, A and B MR1 can be accessed directly at H’21’ and H’29’ in the Extended section of the address map means of the ‘MR Pointers’ at the 0x00 and ...

Page 28

Philips Semiconductors Dual UART MR2 – Mode Register 2, A and B MR2 can be accessed directly at 0x22 and 0x2A in the Extended section of the address map means of the ‘MR Pointers’ at the 0x00 and ...

Page 29

Philips Semiconductors Dual UART MR3 – Mode Register 3, A and B Bit 7 Bit 6 1 Xon/Xoff Address Recognition transparency transparency 0 = flow control characters 0 = Address characters received are loaded onto received are loaded to the ...

Page 30

Philips Semiconductors Dual UART RxCSR – Receiver Clock Select Register A and B TxCSR Transmitter Clock Select Register A and B Both registers consist of single 6-bit field that selects the clock source for the receiver and transmitter respectively. During ...

Page 31

Philips Semiconductors Dual UART CRx – Command Register Extension, A and used to write commands to the DUART. Bit 7 Bit 6 Lock Tx and Rx Enables Enable lock Rx & Tx state 0 ...

Page 32

Philips Semiconductors Dual UART 10111 Host Xoff (or transmitter pause) command (CRTXoff). This command allows tight host CPU control of the flow control of the channel transmitter. When interrupted for receipt of a Xoff character by the receiver, the host ...

Page 33

Philips Semiconductors Dual UART SR – Channel Status Register A and B Bit 7 Bit 6 Received Break Framing Error Yes 1 = Yes SR[7] – Received Break This bit indicates that ...

Page 34

Philips Semiconductors Dual UART ISR – Interrupt Status Register A and B Bit 7 Bit 6 Bit 5 I/O Port Receiver Address Change Watch-dog recognition event of Time-out state This register provides the status of all potential interrupt sources for ...

Page 35

Philips Semiconductors Dual UART IMR – Interrupt Mask Register A and B Bit 7 Bit 6 I/O Port Change of state Rx Watch-dog Time-out The programming of this register selects which bits in the ISR cause an interrupt output. If ...

Page 36

Philips Semiconductors Dual UART TxFIL – Transmitter FIFO Interrupt Level A and B Bits 7:0 Any one of 256 FIFO empty positions The position in the Tx FIFO that caused the transmitter will enter the interrupt arbitration process. This register ...

Page 37

Philips Semiconductors Dual UART XISR – Xon–Xoff Interrupt Status Register A and B (Reading this register clears XISR(7:4)) Bits 7:6 Bits 5:4 Received X Character Status Automatic X Character transmission status 00 = none 00 = none 01 = Xoff ...

Page 38

Philips Semiconductors Dual UART Programmable Counters, Timers and Baud Rate generators PBRGPU – Programmable BRG Timer Reload Registers, Upper 0 and 1 Bits 7:0 8 MSBs of the BRG Timer divisor. This is the upper byte of the 16–bit value ...

Page 39

Philips Semiconductors Dual UART CTPU Counter Timer Preset Upper 0 and 1 CTPU Bit 7 BIT 6 The lower eight (8) bits for the 16 bit counter timer preset register CTPL Counter –Timer Preset Low 0 and 1 CTPL Bit ...

Page 40

Philips Semiconductors Dual UART Registers of the Arbitrating Interrupt System and Bidding control ICR – Interrupt Control Register Bits 7:0 Upper eight bits of the Arbitration Threshold This register provides a single 8–bit field called the interrupt threshold for use ...

Page 41

Philips Semiconductors Dual UART IVR – Interrupt Vector Register Bits 7:0 8 data bits of the Interrupt Vector (IVR) The IVR contains the byte that will be placed on the data bus during an IACKN cycle when the GCCR bits ...

Page 42

Philips Semiconductors Dual UART BCRBRK – Bidding Control Register – Break Change, A and B Bits 7:0 MSBs of break change interrupt bid This register provides the 8 MSBs of the Interrupt Arbitration number for a break change interrupt. BCRCOS ...

Page 43

Philips Semiconductors Dual UART IPCE – Input Change Detect Enable, A and for for B) Bit 7 Bit 6 Bit 5 I/O7 n enable I/O6 n enable I/O5 n enable 0 = ...

Page 44

Philips Semiconductors Dual UART SOPR A and SOPR B – Set the Output Port Bits (OPR A and OPR B) SOPR [7:0] – Ones in the byte written to this register will cause the corresponding bit positions in the OPR ...

Page 45

Philips Semiconductors Dual UART THE REGISTERS FOR COMPATIBILITY WITH PREVIOUS DUARTS The purpose of including previous functionality is to allow users to call communications code that may be used in former systems. When the registers in this lower 16–position address ...

Page 46

Philips Semiconductors Dual UART Table 8. Baud Rate Generator Characteristics Crystal or Clock = 14.7456 MHz NORMAL RATE ACTUAL 16X (BAUD) CLOCK (kHz) 50 0.8 75 1.2 110 1.759 134.5 2.153 150 2.4 200 3.2 300 4.8 600 9.6 1050 ...

Page 47

Philips Semiconductors Dual UART REGISTER DESCRIPTIONS Mode Registers MR0 Mode Register 0 MR0 is accessed by setting the MR pointer to 0 via the command register command B. Bit 7 BIT 6 MR0 A Rx WATCH RxINT BIT 2 MR0 ...

Page 48

Philips Semiconductors Dual UART MR1 Mode Register 1 Bit 7 BIT 6 MR1 A Rx RxINT MR1 B CONTROLS BIT 1 RTS RxRDY 1 = Yes 1 = FFULL NOTE block error mode ...

Page 49

Philips Semiconductors Dual UART SR Status Register Bit 7 BIT RECEIVED FRAMING SR B BREAK* ERROR Yes 1 = Yes NOTE: *These status bits are appended to the corresponding ...

Page 50

Philips Semiconductors Dual UART CSR A – Channel A Clock Select Register CSR A [7:4] – Channel A Receiver Clock Select This field selects the baud rate clock for the Channel A receiver. The field definition is shown in Table ...

Page 51

Philips Semiconductors Dual UART CR A and B Command Register CR, one for each channel, controls the channel commands and enables/disables the receiver and transmitter. Commands may be to the upper and lower four bits in the same bus cycle. ...

Page 52

Philips Semiconductors Dual UART IPCR Input Port Configuration Register Bit 7 BIT 6 IPCR Delta Delta I change change 1 = change 1 = change IPCR [7:4] I/03A, I/O2 A, I/O1 ...

Page 53

Philips Semiconductors Dual UART ISR – Interrupt Status Register This register provides the status of all potential interrupt sources. The contents of this register are masked by the Interrupt Mask Register (IMR bit in the ISR is a ...

Page 54

Philips Semiconductors Dual UART IMR – Interrupt Mask Register The programming of this register selects which bits in the ISR causes an interrupt output bit in the ISR is a ‘1’ and the corresponding bit in the IMR ...

Page 55

Philips Semiconductors Dual UART OPCR Output Port Configuration Register. Controls [7:2] B Bit 7 BIT 6 I/ OPR[ OPR[ RDY RDY A NOTE: I/O0 B and ...

Page 56

Philips Semiconductors Dual UART SOPR – Set Bits in the OPR Ones in the byte written to this register will cause the corresponding bit positions in the OPR to set to 1. Zeros have no effect. This allows software to ...

Page 57

Philips Semiconductors Dual UART REGISTER MAPS The registers of the SC28L202 are loosely partitioned into two groups: those used in controlling data channels and those used in handling the actual data flow and status. Below is shown the general configuration ...

Page 58

Philips Semiconductors Dual UART REGISTER MAP NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip. These are denoted by a ‘ ’ symbol A[6:0] READ EXTENSION 010 ...

Page 59

Philips Semiconductors Dual UART REGISTER MAP NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip. These are denoted by a ‘ ’ symbol A[6:0] READ NEW 100 ...

Page 60

Philips Semiconductors Dual UART REGISTER MAP NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip. These are denoted by a ‘ ’ symbol A[6:0] READ GLOBAL 110 ...

Page 61

Philips Semiconductors Dual UART GENERAL TIMING CONSIDERATIONS FOR THE SC28L202 This part is designed to operate in both the Intel (80xxx) and Motorola (68000) environments. When the Motorola mode is used, the definition, function, polarity and timing of some pins ...

Page 62

Philips Semiconductors Dual UART CHARACTERISTICS (NOMINAL 10 – +85 C unless otherwise specified. CC amb Symbol Parameter Reset timing (See Figures Reset ...

Page 63

Philips Semiconductors Dual UART Symbol Parameter 68000 or Motorola bus timing (See Figures RWN set-up time to CEN LOW CS(mot) t Data bus set-up time before X1 HIGH DS(mot) t Data hold time after CEN HIGH ...

Page 64

Philips Semiconductors Dual UART DC ELECTRICAL CHARACTERISTICS V = 3 – +85 C unless otherwise specified CC amb SYMBOL PARAMETER V Input low voltage IL V Input high voltage (X1/SCLK Input ...

Page 65

Philips Semiconductors Dual UART CHARACTERISTICS (NOMINAL 3 3 – +85 C unless otherwise specified CC amb Symbol Parameter Reset timing (See Figures Reset ...

Page 66

Philips Semiconductors Dual UART Symbol Parameter 68000 or Motorola bus timing (See Figures RWN set-up time to CEN LOW CS(mot) t Data bus set-up time before X1 HIGH DS(mot) t Data hold time after CEN HIGH ...

Page 67

Philips Semiconductors Dual UART Intel-type bus: CEN RDN, RWN CEN RDN, WRN CEN RDN, WRN CEN RDN, WRN Motorola-type: CEN RWN (Write) RWN (Read) CEN RWN DACKN NOTE: In the 68K mode, the write occurs on the rise of CEN ...

Page 68

Philips Semiconductors Dual UART RESETN t RES Figure 4. Reset Timing (80XXX mode) A0– CEN t CS RDN D0–D7 FLOAT (READ) WDN D0–D7 (WRITE) 2005 Nov 01 RESETN SD00729 Figure 5. Reset Timing (68XXX mode ...

Page 69

Philips Semiconductors Dual UART X1/CLK A1–A4 RWN CEN D0– DACKN NOTE: DACKN low requires two rising edges of X1 clock after CEN is low. Figure 7. Bus Timing (Read Cycle) (68XXX mode) X1/CLK A1–A4 RWN CEN D0–D7 DACKN ...

Page 70

Philips Semiconductors Dual UART X1/CLK INTRN IACKN D0–D7 DACKN NOTE: DACKN low requires two rising edges of X1 clock after IACKN is low. RDN IP0–IP6 (a) INPUT PINS WRN OP0–OP7 (b) OUTPUT PINS 2005 Nov 01 t CSC t DD ...

Page 71

Philips Semiconductors Dual UART WRN INTERRUPT OUTPUT RDN INTERRUPT OUTPUT NOTES: 1. INTRN or OP3-OP7 when used as interrupt outputs. 2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is ...

Page 72

Philips Semiconductors Dual UART TxC (INPUT) TxD TxC (1X OUTPUT) RxC (1X INPUT) RxD TxD D1 TRANSMITTER ENABLED TxRDY (SR2) WRN CTSN (IP0) 2 RTSN (OP0) OPR( NOTES: 1. Timing shown for MR2[ ...

Page 73

Philips Semiconductors Dual UART D1 RxD RECEIVER ENABLED RxRDY (SR0) FFULL (SR1) RxRDY/ FFULL 2 (OP5) RDN STATUS DATA D1 OVERRUN (SR4) 1 RTS (OP0) OPR[ NOTES: 1. Timing shown for MR1[ Shown for OPCR[4] ...

Page 74

Philips Semiconductors Dual UART I = 2.4 mA INTRN DACKN 2 return 400 A V return D0–D7 TxDA/B OP0–OP7 85 pF Figure 18. Test Conditions on ...

Page 75

Philips Semiconductors Dual UART TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm 2005 Nov 01 69 Product data sheet SC28L202 SOT364-1 ...

Page 76

Philips Semiconductors Dual UART REVISION HISTORY Rev Date Description _7 20051101 Product data sheet. Supersedes data of 16 April 2004 (9397 750 13049). Modifications: Page 3, description for pin 21, I/M: changed “When HIGH or not connected configures the bus ...

Page 77

Philips Semiconductors Dual UART Data sheet status Product [1] Level Data sheet status [2] [3] status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or ...

Related keywords