SC28L202A1DGG/G,11 NXP Semiconductors, SC28L202A1DGG/G,11 Datasheet - Page 70
![IC UART DUAL W/FIFO 56-TSSOP](/photos/6/90/69069/56-tssop_sml.jpg)
SC28L202A1DGG/G,11
Manufacturer Part Number
SC28L202A1DGG/G,11
Description
IC UART DUAL W/FIFO 56-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L202A1DGG118.pdf
(77 pages)
Specifications of SC28L202A1DGG/G,11
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935279792118
SC28L202A1DGG/G-T
SC28L202A1DGG/G-T
SC28L202A1DGG/G-T
SC28L202A1DGG/G-T
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Philips Semiconductors
2005 Nov 01
NOTE: DACKN low requires two rising edges of X1 clock after IACKN is low.
Dual UART
DACKN
X1/CLK
(a) INPUT PINS
(b) OUTPUT PINS
D0–D7
INTRN
IACKN
OP0–OP7
IP0–IP6
WRN
RDN
Figure 9. Interrupt Cycle Timing (68XXX mode)
t
PS
t
t
DD
CSC
OLD DATA
Figure 10. Port Timing
64
t
DCR
t
PH
t
PD
t
DAT
NEW DATA
t
DF
SD00135
SD00732
SC28L202
Product data sheet
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