TDA8933BTW/N2,118 NXP Semiconductors, TDA8933BTW/N2,118 Datasheet - Page 7

• Manufacturer Part Number: TDA8933BTW/N2,118
• Description: IC AMP AUDIO CLASS D 32HTSSOP
• Manufacturer: NXP Semiconductors
• Type: Class Dr

Specifications of TDA8933BTW/N2,118

• Output Type: 1-Channel (Mono) or 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 20.6W x 1 @ 16 Ohm; 10.3W x 2 @ 8 Ohm
• Voltage - Supply: 10 V ~ 36 V, ±5 V ~ 18 V
• Features: Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935285222118

NXP Semiconductors
UBA2074(A)
Preliminary data sheet
7.1 IC Supply
7.2 VDD clamp
The IC can be supplied in two ways, as illustrated in
at which the IC starts up and stops, non-overlap time and minimum phase shift during
PWM dimming depend on the this supply configuration.
In the low voltage configuration the VDC pin is connected to an external supply with a
voltage of 9 V to 30 V. The VDD-pin is only connected to a buffer capacitor. The VDD-pin
acts as a regulated 12 V output, from which the gate drivers are supplied.
In the high voltage configuration the VDC-pin is connected to the VDD-pin. Both pins
are supplied with a start-up current source and an auxiliary supply. The auxiliary supply is
made by the inverter itself using an auxiliary winding on the lamp transformer or a dV/dt
supply. To start up a current source of minimal I
supplied by a buffer capacitor (C1 in
start-up current source may be a resistor connected to the inverter supply voltage if that
has a high enough voltage. The auxiliary supply must not exceed the maximum voltage
allowed on the VDD-pin as stated in
In the high voltage configuration, when the IC is disabled (EN-pin low) or in the stop state,
the VDD clamp is activated. The VDD clamp is always disconnected when the IC is
supplied in low voltage configuration.
The VDD clamp is an internal active zener of V
VDD-pin. It prevents the start up current source from charging the supply buffer capacitor
to a too high voltage. The current supplied by the start up current source must always be
below the maximum internal zener clamp current as stated in
to the IC, in the high voltage configuration, the IC should not be supplied directly by a low
impedance voltage source.
Fig 5. IC supply configurations
Rev. 02.0 — February 2007
High Voltage Full-bridge control IC for CCFL backlighting
Table 3
Figure
5) until the auxiliary supply is settled. The
and has to be above V
supply(hv,start)
VDD(clamp)
Figure
(see
is needed. At start-up the IC is
5. The voltage at the VDC pin
Table
Table
UBA2074(A)
VDC(stop-high)
3. To prevent damage
5) connected to the
© NXP B.V. 2007. All rights reserved.
.
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