LXT361QE Intel Corporation, LXT361QE Datasheet
LXT361QE
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LXT361QE Summary of contents
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LXT361 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Applications ISDN PRI CSU/NTU interface to T1/E1 Service Wireless Base Station interface Product Features Fully integrated transceiver for Long or Short-Haul T1 interfaces Crystal-less digital jitter attenuation — ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Contents 1.0 General Description 2.0 Pin Assignments and Signal Descriptions 2.1 Mode Dependent Signals ...................................................................................... 9 3.0 Functional Description 3.1 Initialization..........................................................................................................13 3.1.1 Reset Operation .....................................................................................13 3.2 Transmitter ..........................................................................................................13 3.2.1 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figures 1 LXT361 Block Diagram ......................................................................................... 7 2 LXT361 Pin Assignments and Markings ............................................................... 8 3 50% Duty Cycle Coding ...................................................................................... 14 4 TAOS with LLOOP .............................................................................................. 18 5 ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Tables 1 LXT361 Clock and Data Pin Assignments by Mode1............................................ 9 2 LXT361 Processor Interface Pins.......................................................................... 9 3 LXT361 Signal Descriptions ................................................................................10 4 Diagnostic Mode Summary .................................................................................16 5 Register ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Revision History Revision Date 6 Description Datasheet ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 1.0 General Description The LXT361 is a fully integrated, combination transceiver for T1/E1 ISDN Primary Rate Interface (ISDN PRI) and general T1/E1 Long and Short Hual applications. The device ...
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... RNEG / BPV RPOS / RDATA RCLK n n/c AD6 AD7 n LXT361PE LXT361PE XXXXXX 9 21 XXXXXXXX AD6 20 10 AD7 LXT361QE XX LXT361QE 5 LXT361LE XX 6 XXXXXX LXT361LE 7 XXXXXXXX AD2 AD1 AD0 GND VCC RRING RTIP 33 n/c 32 AD1 AD0 31 30 n/c 29 GND n VCC n RRING RTIP 24 n/c 23 Datasheet ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 2.1 Mode Dependent Signals As shown in Figure according to the selected mode(s) of operation. These pins, associated signal names, and operating modes are summarized in Table 1. LXT361 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 3. LXT361 Signal Descriptions Pin # Symbol PLCC QFP 1 39 MCLK 2 41 TCLK 3 42 TPOS/TDATA/ INSLER TNEG/INSBPV ALE/ RNEG/BPV ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 3. LXT361 Signal Descriptions (Continued) Pin # Symbol PLCC QFP 9 7 RD/ AD6 11 10 AD7 R TTIP 16 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 3. LXT361 Signal Descriptions (Continued) Pin # Symbol PLCC QFP 22 29 GND 23 31 AD0 24 32 AD1 25 35 AD2 26 36 AD3 27 37 AD4 ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 3.0 Functional Description The LXT361 is a fully integrated, PCM transceiver for Long- or Short-Hual, 1.544 Mbps (T1) or 2.048 Mbps (E1) applications allowing full-duplex transmission of digital data ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 3.2.2 Transmit Monitoring The transmitter includes a short circuit limiter that limits the current sourced into a low impedance load. The limiter automatically resets when the load current drops ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 3.3 Receiver A 1:1 transformer provides the interface to the twisted-pair line. Recovered data is output at RPOS/ RNEG (RDATA in Unipolar mode), and the recovered clock is output ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 3.4 Jitter Attenuation A Jitter Attenuation Loop (JAL) with an Elastic Store (ES) provides jitter attenuation as shown in the Test Specifications section. The JAL requires no special circuitry, ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 4. Diagnostic Mode Summary Diagnostic Mode Remote Loopback (RLOOP) In-band Network Loopback (NLOOP) Dual Loopback (DLOOP) Internal Data Pattern Generation and Detection Transmit All Ones (TAOS) Quasi-Random Signal ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 4. TAOS with LLOOP Figure 5. Local Loopback 3.5.1.2 Analog Loopback See Figure 6. Analog loopback (ALOOP) exercises the maximum number of functional blocks. ALOOP operation disconnects the ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 6. Analog Loopback 3.5.1.3 Remote Loopback See Figure 7. In Remote loopback (RLOOP) mode, the device ignores the transmit data and clock inputs (TCLK and TPOS/TNEG or TDATA), ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications With NLOOP detection enabled, the receiver looks for the NLOOP data patterns (00001 = enable, 001 = disable) in the input data stream. When the receiver detects an NLOOP ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 3.5.2.2 Quasi-Random Signal Source (QRSS) See Figure 10. For T1 operation, the Quasi-Random Signal Source (QRSS random bit sequence (PRBS) with no more than 14 consecutive ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 3.5.3 Error Insertion and Detection 3.5.3.1 Bipolar Violation Insertion Bipolar violation insertion is available In Unipolar mode. Choosing Unipolar mode configures the INSBPV pin. To insert bipolar violation (BPV), ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 ZEROV detection is enabled when the HDB3 encoders/decoders are enabled. This requires CR1.ENCENB = 1, also CR1.EC4:1 = 100x or 1010, which establishes E1 operation. To select ZEROV detection, ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 3.5.5 Other Diagnostic Reports 3.5.5.1 Receive Line Attenuation Indication The Equalizer Status Register (ESR) provides an approximation of the line attenuation encountered by the device. The four most significant ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 The interrupt is cleared when the interrupt condition no longer exists, and the host processor writes the respective interrupt causing bit(s) in the Interrupt Clear Register ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 4.0 Register Definitions The LXT361 contains five read/write and three read-only registers. register addresses. Note that only bits A6 through A1 of the address byte are valid; the address ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 7. Control Register #1 Read/Write, Address (A7-A0) = x010000x Bit Name 0 EC1 1 EC2 (see 2 EC3 3 EC4 1 = Enable Unipolar I/O mode and allow ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 9. Control Register #2 Read/Write, Address (A7-A0) = x010001x Bit Name 1 = Enable Remote loopback mode 1 0 ERLOOP 0 = Disable Remote loopback mode 1 = ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 11. Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x Bit Name 1 = Clear/Mask Loss of Signal interrupt. 0 CLOS 0 = Enable Loss of Signal interrupt. 1 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 13. Performance Status Register Read Only, Address (A7-A0) = x010101x Bit Name 1 = Loss of Signal occurred. 0 LOS 0 = Loss of Signal did not occur. ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 15. Control Register #4 Read/Write, Address (A7-A0) = x010111x Bit Name 4 - reserved–set to 0 for normal operation; ignore when reading reserved–set to 0 for ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 5.0 Application Information 5.1 Transmit Return Loss Table 16 shows the specification for transmit return loss in E1 applications. The G.703/CH PTT specification is a Swiss Telecommunications Ministry specification. ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 18. Transmit Return Loss (2.048 Mbit/s–Long-Haul) High Return Loss Configuration EC4-1 Xfrmr/Rt 1:2/ 15 1001 1:1.53/15 Table 19. Transmit Return Loss (2.048 Mbit/s–Long-Haul) EC4-1 Xfrmr/Rt 1:2/ 1010 9.1 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 22. Recommended Transformers for LXT361 Tx/Rx Turns Ratio 1:1.53 1:1.15 Tx 1:2 1:2.3 Rx 1:1 Figure 11 shows a typical LXT361 application in either ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 11. Typical T1/E1 LXT361 Application 2.048 MHz/ 1.544 MHz TCLK TPOS TNEG T1/E1 Framer RCLK RPOS RNEG 68 F 0.1 F NOTES: 1. See Table 17 through 2. ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 6.0 Test Specifications Note: Table 23 through Table 34 specifications of the LXT361 and are guaranteed by test except, where noted, by design. The minimum and maximum values listed ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 24. Recommended Operating Conditions (Continued) Parameter Short Haul 3 T1 low power Long Haul Total power Short Haul 4 T1 dissipation standard power Long Haul Short Haul/ 5 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 26. Analog Characteristics (Continued) Parameter kHz 8 kHz - 40 kHz 2 Jitter added by the transmitter kHz Broad Band ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 12. 2.048 MHz E1 Pulse (See Table 27 100% 50% 0% Table 27. 2.048 MHz E1 Pulse Mask Specifications Parameter Test load impedance Nominal peak mark ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 13. 1.544 MHz T1 Pulse (DS1 and DSX-1) (See Table 28) 1.5 Normalized Amplitude 1.0 0.5 0.5 -0.5 0.0 Time (in Unit Intervals) -0.5 Table 28. 1.544 MHz ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 29. Master and Transmit Clock Timing Characteristics for T1 Operation (See Figure 14) Parameter Transmit clock tolerance Transmit clock duty cycle TPOS/TNEG to TCLK setup time TCLK to ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 31. Receive Timing Characteristics for T1 Operation (See Figure 15) Parameter 2, 3 Receive clock duty cycle 2, 3 Receive clock pulse width Receive clock pulse width high ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Table 33. LXT361 20 MHz Intel Bus Parallel I/O Timing Characteristics (See Figure 16) Parameter ALE pulse width Address valid to ALE falling edge ALE falling edge to address ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 16. LXT361 I/O Timing Diagram for Intel Address/Data Bus CS T LHLL T LLAX ALE T AVLL RD AD0-7_R WR AD0-7_W Table 34. LXT361 16.78 MHz Motorola Bus ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 17. LXT361 I/O Timing Diagram for Motorola Address/Data Bus CS T ASHASL T AVASL AS DS R/W_Read AD0-7_Read R/W_Write AD0-7_Write Figure 18. Typical T1 Jitter Tolerance at 36 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 19. Typical E1 Jitter Tolerance Datasheet ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 20. Typical E1 Jitter Attenuation Datasheet 47 ...
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LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 21. \T1 Jitter Attenuation 48 Datasheet ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 7.0 Mechanical Specifications Figure 22. Plastic Leaded Chip Carrier (PLCC) Package Specifications 28-Pin PLCC • Part Number LXT361PE • Extended Temperature Range (-40 ° ° ...
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... LXT361 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 23. Plastic Quad Flat Package (PQFP) Specifications 44-Pin PQFP • Part Number LXT361QE • Extended Temperature Range (-40 ° ° Dim BSC—Basic Spacing between Centers Inches Millimeters Min Max Min – ...
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Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT361 Figure 24. Low-Profile Quad Flat Package (LQFP) Specifications 44-Pin LQFP • • D/2 E1 Dimension ...
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