HY57V643220CT-7 Hynix Semiconductor, HY57V643220CT-7 Datasheet
HY57V643220CT-7
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HY57V643220CT-7 Summary of contents
Page 1
... I/O and high bandwidth. HY57V643220CT(P) is organized as 4banks of 524,288x32. HY57V643220CT(P) is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth ...
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... RAS, CAS and WE define the operation Refer function truth table for details Controls output buffers in read mode and masks input data in write mode Multiplexed data input / output pin Power supply for internal circuits and input buffers Power supply for output buffers No connection HY57V643220CT( ...
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... Rev. 0.9 / Feb. 2004 Refresh Counter 512Kx32 Bank 3 Row 512Kx32 Bank 2 Pre Decoder 512Kx32 Bank 1 512Kx32 Bank 0 Column Pre Decoder Column Add Counter Burst Counter CAS Latency Data Out Control HY57V643220CT(P) DQ0 DQ1 Memory Cell Array DQ30 DQ31 Y decoder Pipe Line Control 3 ...
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... V DD, DDQ SOLDER (TA °C ) Symbol Min , V 3.0 DDQ 2 0.3 SSQ (TA °C , 3.0V ≤ V ≤ 3.6V Symbol Vtrip Voutref CL HY57V643220CT(P) Rating -55 ~ 125 -1.0 ~ 4.6 -1 260 . 10 Typ. Max Unit 3.3 3 0.3 V DDQ 0 0.8 V =0V - Note1) Value Unit 2.4/0 1.4 ...
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... OUT OUT Rev. 0.9 / Feb. 2004 Pin CLK A0 ~ A10, BA0, BA1, CKE, CS, RAS, CAS, WE, DQM0~3 DQ0 ~ DQ31 Vtt=1.4V RT=500 Ω Output 30pF Symbol Min 2.4 - HY57V643220CT(P) Symbol Min I/O Vtt=1.4V RT=50 Ω 50Ω 30pF AC Output Load Circuit Max Unit ...
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... VIH(min), CS VIH(min), tCK = ≥ VDD-0.2V or 0.2V ∞ ≥ VIH(min), tCK = Input signals are ≥ CL=3 290 tCK(min), ≥ tRAS(min), IOL=0mA CL=2 160 ≥ tRRC(min), 2 banks active 260 ≤ 0.2V HY57V643220CT(P) Speed - 200 190 180 170 150 280 260 240 ...
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... HY57V643220CT( Min Max Min Max Min Max Min 1000 1000 1000 10 - 5 ...
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... A new command can be given tRRC after self refresh exit Rev. 0.9 / Feb. 2004 (AC operating conditions unless otherwise noted) -47 -5 -55 Min Max Min Max Min Max Min 100 100 37.6 100K 38 HY57V643220CT( Max Min Max Min Max Min Max - 100 100 100 100 ...
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... HY57V643220CT(P) tRP tAC tOH 3CLKs 4ns 1.5ns 3CLKs 4.5ns 1.5ns 3CLKs 5ns 2ns tRP tAC tOH 3CLKs 4.5ns 1.5ns 3CLKs 5ns ...
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... HY57V643220CT(P) tRP tAC tOH 2CLKs 6ns 2ns 2CLKs 6ns 2.5ns 2CLKs 6ns 2.5ns tRP tAC tOH 2CLKs 6ns 2ns 2CLKs 6ns 2 ...
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... Exiting Self Refresh occurs by asynchronously bringing CKE from low to high Don’t care Logic High Logic Low. BA =Bank Address Row Address Column Address, Opcode = Operand Code, NOP = No Operation Rev. 0.9 / Feb. 2004 CKEn CS RAS CAS HY57V643220CT(P) A10/ WE DQM ADDR code Pin High (Other Pins OP code Note ...
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... PACKAGE INFORMATION 400mil 86pin Thin Small Outline Package 22.327(0.8790) 22.149(0.8720) 0.50(0.0197) Rev. 0.9 / Feb. 2004 11.938(0.4700) 11.735(0.4620) 10.262(0.4040) 10.058(0.3960) 0.150(0.0059) 0.050(0.0020) 5deg 0.21(0.008) 0deg 0.18(0.007) HY57V643220CT(P) Unit : mm(inch) 1.194(0.0470) 0.991(0.0390) 0.210(0.0083) 0.597(0.0235) 0.406(0.0160) 0.120(0.0047) 12 ...