M36W432TG70ZA6T STMicroelectronics, M36W432TG70ZA6T Datasheet

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M36W432TG70ZA6T

Manufacturer Part Number
M36W432TG70ZA6T
Description
Manufacturer
STMicroelectronics
Datasheet
FEATURES SUMMARY
FLASH MEMORY
February 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
SUPPLY VOLTAGE
– V
– V
– V
ACCESS TIME: 70,85ns
LOW POWER CONSUMPTION
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M36W432T: 88BAh
– Bottom Device Code, M36W432B: 88BBh
32 Mbit (2Mb x16) BOOT BLOCK
– 8 x 4 KWord Parameter Blocks (Top or
PROGRAMMING TIME
– 10µs typical
– Double Word Programming Option
BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WPF for Block Lock-Down
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
COMMON FLASH INTERFACE
– 64 bit Security Code
SECURITY
– 64 bit user programmable OTP cells
– 64 bit unique device identifier
– One parameter block permanently lockable
Bottom Location)
DDF
DDS
PPF
= 12V for Fast Program (optional)
= 2.7V to 3.3V
= V
and 4 Mbit (256K x16) SRAM, Multiple Memory Product
DDQF
= 2.7V to 3.3V
32 Mbit (2Mb x16, Boot Block) Flash Memory
SRAM
Figure 1. Packages
4 Mbit (256K x 16 bit)
ACCESS TIME: 70ns
LOW V
POWER DOWN FEATURES USING TWO
CHIP ENABLE INPUTS
DDS
DATA RETENTION: 1.5V
Stacked LFBGA66 (ZA)
8 x 8 ball array
FBGA
M36W432B
M36W432T
PRODUCT PREVIEW
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M36W432TG70ZA6T Summary of contents

Page 1

Mbit (2Mb x16, Boot Block) Flash Memory and 4 Mbit (256K x16) SRAM, Multiple Memory Product FEATURES SUMMARY SUPPLY VOLTAGE – 2.7V to 3.3V DDF – 2.7V to 3.3V DDS DDQF – V ...

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M36W432T, M36W432B TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Figure 10. Flash Write AC Waveforms, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 16. Flash Write ...

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M36W432T, M36W432B Figure 25. Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SUMMARY DESCRIPTION The M36W432 is a low voltage Multiple Memory Product which combines two memory devices Mbit boot block Flash memory and a 4 Mbit SRAM. Recommended operating conditions do not allow both the Flash and the SRAM ...

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M36W432T, M36W432B Figure 3. LFBGA Connections (Top view through package A20 B A16 SSS D E WPF F LBS G A18 SIGNAL DESCRIPTIONS See Figure 2 Logic ...

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Flash Write Protect (WPF). Write Protect is an input that gives an additional hardware protection for each block. When Write Protect Lock-Down is enabled and the protection status of the block cannot be changed. When Write Protect ...

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M36W432T, M36W432B FUNCTIONAL DESCRIPTION The Flash and SRAM components have separate power supplies and grounds and are distinguished by three chip enable inputs: EF for the Flash mem- ory and, E1S and E2S for the SRAM. Recommended operating conditions do ...

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Table 2. Main Operation Modes Operation Mode Read Write Block Locking V Standby Reset Output ...

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M36W432T, M36W432B Flash Memory Component The Flash Memory Mbit (2 Mbit x 16) de- vice that can be erased electrically at the block level and programmed in-system on a Word-by- Word basis. These operations can be performed ...

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Figure 5. Flash Block Addresses Top Boot Block Addresses 1FFFFF 4 KWords 1FF000 1F8FFF 4 KWords 1F8000 1F7FFF 32 KWords 1F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 Note: Also see Appendix A, Tables 26 and 27 for a ...

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M36W432T, M36W432B OPERATING MODES Flash Bus Operations There are six standard bus operations that control the device. These are Bus Read, Bus Write, Out- put Disable, Standby, Automatic Standby and Re- set. See Table 2, Main Operation Modes, for a ...

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Read Electronic Signature Command. The Read Electronic Signature command reads the Manufacturer and Device Codes and the Block Locking Status, or the Protection Register. The Read Electronic Signature command consists of one write cycle, a subsequent read will output the ...

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M36W432T, M36W432B Program/Erase Suspend Command. The Pro- gram/Erase Suspend command is used to pause a Program or Erase operation. One bus write cycle is required to issue the Program/Erase command and pause the Program/Erase controller. During Program/Erase Suspend the Command ...

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Block Lock-Down Command. A locked block cannot be Programmed or Erased, or have its Lock status changed when WP is low high, V the Lock-Down function is dis- IH, abled and the locked blocks can be individually ...

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M36W432T, M36W432B Table 4. Read Electronic Signature Code Device EF GF Manufacture Code V V M36W432T IL IL Device Code V V M36W432B IL IL Note: RPF = Table 5. Read Block Signature ...

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Table 7. Program, Erase Times and Program/Erase Endurance Cycles Parameter Word Program Double Word Program Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) Flash Block Locking The Flash Memory features an instant, ...

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M36W432T, M36W432B Reading a Block’s Lock Status. The lock status of every block can be read in the Read Electronic Signature mode of the device. To enter this mode write 90h to the device. Subsequent reads at Block Address 00002h ...

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Flash Status Register The Status Register provides information on the current or previous Program or Erase operation. The various bits convey information and errors on the operation. To read the Status register the Read Status Register command can be issued, ...

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M36W432T, M36W432B Program Suspend Status (Bit 2). The Program Suspend Status bit indicates that a Program oper- ation has been suspended. When the Program Suspend Status bit is High (set to ‘1’), a Program/ Erase Suspend command has been issued ...

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... Output Enable, GS DVE2L with Write Enable, WS plied. Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter (1) M36W432T, M36W432B ...

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M36W432T, M36W432B DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC characteristics Tables that follow, are de- rived from ...

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Table 14. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current Standby Current DDS DD I Supply Current (Reset) DDD I Supply Current DD I Supply Current (Read) DDR I Supply Current (Program) ...

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M36W432T, M36W432B Symbol Parameter Program Voltage V PPH (Program or Erase operations) Program Voltage V PPLK (Program and Erase lock-out) V Supply Voltage (Program DDF V LKO and Erase lock-out) Figure 9. Flash Read AC Waveforms A0-A20 EF GF DQ0-DQ15 ...

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Symbol Alt (1) t Output Enable Low to Output Transition t OLZ GLQX Note: 1. Sampled only, not 100% tested may be delayed ELQV Parameter - t after the falling edge of EF without ...

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M36W432T, M36W432B Figure 10. Flash Write AC Waveforms, Write Enable Controlled 26/57 ...

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Table 16. Flash Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH ...

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M36W432T, M36W432B Figure 11. Flash Write AC Waveforms, Chip Enable Controlled 28/57 ...

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Table 17. Flash Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH ...

Page 30

M36W432T, M36W432B Figure 12. Flash Power-Up and Reset AC Waveforms WF, EF,GF RPF tVDHPH VDDF, VDDQF Power-Up Table 18. Flash Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip Enable t PHEL Low, ...

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Figure 13. SRAM Read AC Waveforms, Address Controlled with UBS = LBS = V A0-A17 DQ0-DQ15 DATA VALID Note: E1S = Low, E2S = High Low High. Figure 14. SRAM Read AC Waveforms, E1S, E2S or ...

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M36W432T, M36W432B Figure 15. SRAM Standby AC Waveforms E1S E2S I DD Table 19. SRAM Read AC Characteristics Symbol Alt t t Read Cycle Time AVAV Address Valid to Output Valid AVQV Address Transition ...

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Figure 16. SRAM Write AC Waveforms, WS Controlled with GS Low A0-A17 tAVE1L E1S E2S UBS, LBS tAVWL WS tWLQZ DQ0-DQ15 Figure 17. SRAM Write AC Waveforms, WS Controlled with GS High A0-A17 tAVE1L E1S E2S UBS, LBS tAVWL WS ...

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M36W432T, M36W432B Figure 18. SRAM Write AC Waveforms, UBS and LBS Controlled A0-A17 E1S E2S tAVWL UBS, LBS WS DQ0-DQ15 Figure 19. SRAM Write AC Waveforms, E1S Controlled A0-A17 tAVE1L E1S E2S UBS, LBS tAVWL WS DQ0-DQ15 34/57 tAVAV VALID ...

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Table 20. SRAM Write AC Characteristics Symbol Alt t t Write Cycle Time AVAV WC (1) t Address Valid to Chip Enable 1 Low t AVE1L AS (1) t Address Valid to Chip Enable 2 High t AVE2H AS t ...

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M36W432T, M36W432B Figure 20. SRAM Low V Data Retention AC Waveforms, E1S Controlled DDS tCDR V DDS 2.8 V 1.5 V E1S V SSS Figure 21. SRAM Low V Data Retention AC Waveforms, E2S Controlled DDS V DDS 2.8 V ...

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PACKAGE MECHANICAL Figure 22. Stacked LFBGA66 - ball array, 0.8 mm pitch, Bottom View Package Outline BALL "A1" Note: Drawing is not to scale. Table 22. Stacked LFBGA66 - ...

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M36W432T, M36W432B Figure 23. Stacked LFBGA66 Daisy Chain - Package Connections (Top view through package 38/ AI05220 ...

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Figure 24. Stacked LFBGA66 Daisy Chain - PCB Connections proposal (Top view through package) START POINT # M36W432T, M36W432B END POINT # ...

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... Table 24. Daisy Chain Ordering Scheme Example: Device Type M36W432 Daisy Chain -ZA = LFBGA66: 0.8mm pitch Option T = Tape & Reel Packing For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de- vice, please contact the STMicroelectronics Sales Office nearest to you. 40/57 M36W432T 2.7V to 3.3V M36W432 - ...

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REVISION HISTORY Table 25. Document Revision History Date Version 19-Jun-2001 -01 First Issue Flash Commands Table corrections: Protect/Lock, Unprotect/Unlock, Lock/Lock- 16-Jul-2001 -02 Down 11-Feb-2002 -03 Package mechanical data clarified (Table 22) M36W432T, M36W432B Revision Details 41/57 ...

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M36W432T, M36W432B APPENDIX A. FLASH MEMORY BLOCK ADDRESS TABLES Table 26. Top Boot Block Addresses, M36W432T Size # Address Range (KWord 1FF000-1FFFFF 1 4 1FE000-1FEFFF 2 4 1FD000-1FDFFF 3 4 1FC000-1FCFFF 4 4 1FB000-1FBFFF 5 4 1FA000-1FAFFF 6 ...

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Table 27. Bottom Boot Block Addresses, M36W432B Size # Address Range (KWord 1F8000-1FFFFF 69 32 1F0000-1F7FFF 68 32 1E8000-1EFFFF 67 32 1E0000-1E7FFF 66 32 1D8000-1DFFFF 65 32 1D0000-1D7FFF 64 32 1C8000-1CFFFF 63 32 1C0000-1C7FFF 62 32 1B8000-1BFFFF 61 ...

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M36W432T, M36W432B APPENDIX B. COMMON FLASH INTERFACE (CFI) The Common Flash Interface is a JEDEC ap- proved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine ...

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Table 30. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h bit bit Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h bit ...

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M36W432T, M36W432B Table 31. Device Geometry Definition Offset Word Data Mode 27h 0016h Device Size = 2 28h 0001h Flash Device Interface Code description 29h 0000h 2Ah 0002h Maximum number of bytes in multi-byte program or page = 2 2Bh ...

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Table 32. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version ...

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M36W432T, M36W432B Table 33. Security Code Area Offset Data 80h 00XX Protection Register Lock 81h XXXX 82h XXXX 64 bits: unique device number 83h XXXX 84h XXXX 85h XXXX 86h XXXX 64 bits: User Programmable OTP 87h XXXX 88h XXXX ...

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APPENDIX C. FLASH MEMORY FLOWCHARTS AND PSEUDO CODES Figure 25. Program Flowchart and Pseudo Code Start Write 40h or 10h Write Address & Data Read Status Register YES NO V PPF Invalid YES ...

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M36W432T, M36W432B Figure 26. Double Word Program Flowchart and Pseudo Code Start Write 30h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Read Status Register YES NO V PPF Invalid ...

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Figure 27. Program Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues program_suspend_command ...

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M36W432T, M36W432B Figure 28. Erase Flowchart and Pseudo Code Start Write 20h Write Block Address & D0h Read Status Register YES YES YES b4 Sequence Error ( ...

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Figure 29. Erase Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program/Protection Program or Block ...

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M36W432T, M36W432B Figure 30. Locking Operations Flowchart and Pseudo Code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Status Register NO Locking change confirmed? YES Write FFh End 54/57 locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; ...

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APPENDIX D. FLASH MEMORY COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 34. Write State Machine Current/Next, sheet Data Current SR Read When State bit 7 Array Read (FFh) Read Array “1” Array Read Array Prog.Setup Read “1” ...

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M36W432T, M36W432B Table 35. Write State Machine Current/Next, sheet Read CFI Current State Read Elect.Sg. Query (90h) (98h) Read Array Read Elect.Sg. Read CFI Query Read Status Read Elect.Sg. Read CFI Query Read Elect.Sg. Read Elect.Sg. Read ...

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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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