CS4297-JQ Cirrus Logic, Inc., CS4297-JQ Datasheet
CS4297-JQ
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CS4297-JQ Summary of contents
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... High quality differential CD input n Dual Stereo line level outputs n Extensive power management support n Meets or exceeds Microsoft’s audio performance requirements. ORDERING INFO CS4297-KQ, 48-pin TQFP, 9x9x1 mm CS4297-JQ, 48-pin TQFP, 9x9x1 mm AC-LINK AND AC’97 REGISTERS PWR MGT SYNC BIT_CLK AC- ...
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... Master Volume (Index 02h) ................................................................23 Alternate Volume (Index 04h) .............................................................23 Master Mono Volume (Index 06h) ......................................................23 PC_BEEP Volume (Index 0Ah) ..........................................................24 Phone_In Volume (Index 0Ch) ...........................................................24 Microphone Volume (Index 0Eh) ........................................................24 Stereo Analog Mixer Input Gain Registers (Index 10 - 18h) ...............25 2 CrystalClear™ SoundFusion™ Audio Codec ’97 CS4297 DS242F5 ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 Input Mux Select Register (Index 1Ah) ............................................... 25 Record Gain Register (Index 1Ch) ..................................................... 26 Record Gain Mix (Index 1Eh) ............................................................. 26 General Purpose Register (Index 20h) ............................................... 26 Powerdown Control/Status Register (Index 26h) ...............................27 Reserved Registers (Index 28h - 58h) ................................................ 27 Crystal Revision and Fab ID Register (Index 5Ah) ............................. 27 Vendor Reserved Registers (Index 5C - 7Ah) ...
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... SNR D THD+N A-A - -94 -80 D-A - -86 -80 A-D - -87 -80 A-D - -87 - -100 730 - 5 2.0 2.3 2.5 refers to the digital output pin loading. DL CS4297 = 25° C, ambient =10 k 680 AL CS4297-JQ Min Typ Max Unit V RMS - 0.91 1. 0.91 1.00 - RMS V - 0.091 0.10 - RMS V 0.91 1.0 1.13 RMS 20 - 20,000 20,000 20,000 ...
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... Analog Input voltage Digital Input voltage Ambient Temperature Storage Temperature RECOMMENDED OPERATING CONDITIONS Parameter Power Supplies Operating Ambient Temperature DS242F5 (for CS4297-KQ only) PC Beep (AVss1 = AVss2 = DVss1 = DVss2 = 0 V) +3.3 V Digital +5 V Digital Analog (Supplies, Inputs, Outputs) (Except Supply Pins) (Except Supply Pins) ...
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... F 0.6 × 0.6 × (Note (Note 6) - -82 - (Note RMS CS4297 Min Typ Max Unit 12.7 21.4 - 35.0 - 5.32 9.80 - 23.1 - 9.25 16.0 - 30.0 - 9.20 16.0 - 10.7 - 5.30 9.80 - ~0.00 - 3.30 6.92 - 23.0 - 0.004 0.005 - 0.001 - 5.30 9.80 - 20.3 - CS4297-JQ Min Typ Max Unit 0.4 × F 0.6 × 0.6 × - DAC output. DS242F5 ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 DIGITAL CHARACTERISTICS Parameter Low level input voltage High level input voltage High level output voltage Low level output voltage Input Leakage Current (AC-link inputs) Output Leakage Current (Tri-stated AC-link outputs) Output buffer drive current ...
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... CrystalClear™ SoundFusion™ Audio Codec ’97 T s2_pdown T sync_pr4 T sync2clk (Note 4) T setup2rst T (Note 4) off T rst_low T vdd2rst# Power Up Timing clk_high clk_low clk_period T T ifall sync_high T sync_period Clocks T sync2crd Codec Ready from Startup or Fault Condition CS4297 - 16.24 16.36 1 162.8 244 - rst2clk T rst2sync T ifall T sync_low DS242F5 ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 BIT_CLK SDATA_IN SDATA_OUT, SYNC BIT_CLK Slot 1 SDATA_OUT Write to 0x20 SDATA_IN SYNC RESET# SDATA_OUT, SYNC SDATA_IN, BIT_CLK DS242F5 setup Data Setup and Hold Slot 2 Data PR4 Don’t Care T s2_pdown PR4 Powerdown T setup2rst ...
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... Refers to the Audio Codec ‘97 Component Specification Ver 1.03 published by Intel Corporation [1]. AC’97 Controller Refers to the control chip which interfaces to the CS4297’s AC-Link. This has been also called “DC’97” [1]. ‘set’ Refers to a digital value of Vcc, “1”, or “high”. ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 Frequency Response (FR the deviation in signal level verses frequency. The 0 dB reference point is 1 kHz. The amplitude corner, Ac, lists the maximum deviation in amplitude above and below the 1 kHz reference point. The listed minimum and maximum frequencies are guaranteed to be within the Ac from minimum frequency to maximum frequency inclusive ...
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... Output Mixer There are two output mixers on the CS4297. The stereo output mixer sums together the analog inputs to the CS4297 according to the settings in the vol- ume control registers. The mono output mixer gen- erates a monophonic sum of the left and right channels from the stereo output mixer. However, ...
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... The CS4297 implements an AC’97 compliant de- sign as defined in the Intel Audio Codec 97 Speci- fication Version 1.03. Due to certain design trade- offs and implementation decisions, the CS4297 dif- DS242F5 fers from the AC’97 Specification few minor ways. The following list captures the specification deviations and the implementation decisions made to resolve ambiguities ...
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... REFFLT. This pin is used for internal filtering and should not be used as an external circuit bias voltage. The Vrefout pin is used to supply biasing voltages to external analog circuitry. This pin is not capable of supplying bias current as the specification indicates. CS4297 DS242F5 ...
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... On the next rising edge of BIT_CLK, the first bit of slot 0 is driven by the AC’97 Controller on the SDATA_OUT pin. The CS4297 latches in this data, as the first bit of the frame, on the next falling edge of the BIT_CLK clock signal. Digital AC’97 20 ...
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... Slot Valid bit 14 of Slot 0 (F1) corresponding to Slot 1 is ‘set’. RI6 - RI0 - Bits 18-12 contain the 7-bit register index to the AC’97 Registers in the CS4297. All registers are defined at word addressable boundaries. Bit 12 will be saved for historic purposes but is not decoded. ...
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... RP17 - RP0 - This is the 18-bit PCM playback 2’s compliment data for the right channel DAC in the CS4297. The PCM playback data will be taken from the most significant 18 of the 20 bits in the slot. The least significant 2 bits will be ignored. Any PCM data from the AC’97 Controller that is not at least 18- bits should be left justified in Slot 4 and dithered or zero-padded in the unused bit positions ...
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... Registers. Immediately after a Cold Reset this bit will be returned to the AC’97 Controller ‘cleared’. Once the CS4297’s clocks and voltages are stable, this bit will be set. Until the Codec Ready bit is ‘set’, no AC- Link transactions should be attempted by the AC’97 Controller. ...
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... LP17 LP16 LP15 LP14 LP13 LP12 LP11 LP10 LP9 LP8 LP7 LP6 LP5 LP4 LP3 LP2 LP1 LP0 LP17 - LP0 - This is the 18-bit PCM 2’s compliment capture data from the left channel ADC in the CS4297. The PCM capture data is left justified in the most significant 18 of the 20 bits in the slot. The least significant 2 bits will be ‘cleared’. ...
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... RP17 RP16 RP15 RP14 RP13 RP12 RP11 RP10 RP9 RP8 RP7 RP6 RP5 RP4 RP3 RP2 RP1 RP0 RP17 - RP0 - This is the 18-bit PCM 2’s compliment capture data from the right channel ADC in the CS4297. The PCM capture data is left justified in the most significant 18 of the 20 bits in the slot. The least significant 2 bits will be ‘cleared’. ...
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... CS4297. This is available only when the CS4297’s AC-Link is active and the Codec Ready bit is ‘set’. The Register Reset allows all user accessible regis- ters in the CS4297 to be reset to their default, pow- er-up values. A Register Reset occurs when any value is written to AC’97 Register 00h. ...
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... Table 2. Mixer Registers CS4297 MR5 MR4 MR3 MR2 MR1 MR0 8000h MR5 MR4 MR3 MR2 MR1 MR0 8000h MM5 MM4 MM3 MM2 MM1 MM0 8000h ...
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... Reads from the Reset Register will return configuration information about the part. The CS4297 supports 18-bit DAC and ADC digital audio channels and the Headphone Output (in the form of the Alternate Line Output). The value read from this register will always be 0x0150h. ...
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... CrystalClear™ SoundFusion™ Audio Codec ’97 D10 D10 D10 20dB CS4297 PV3 PV2 PV1 PV0 GN4 GN3 GN2 GN1 GN4 GN3 GN2 GN1 ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 Stereo Analog Mixer Input Gain Registers (Index 10 - 18h) D15 D14 D13 D12 D11 Mute X X GL4 GL3 These registers control the gain levels of the analog input sources to the Input Mixer. Each register step for all registers corresponds to 1 ...
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... This register controls miscellaneous facets of the CS4297 mixer. The only bits which have defined func- tions in the CS4297 are the MIX, MS, and LPBK bits. The MIX bit selects which data to send to the Mono Output Path. A ‘cleared’ value enables the Mono Mix out (a mix of the 5 analog stereo sources plus PCM_OUT), while a ‘ ...
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... This vendor reserved register is being used by the CS4297 to indicate the revision level of the CS4297 as well as the Fab ID where the part was manufactured. This is in addition to the Vendor ID registers located below. The revision level is indicated in bits D11:8 and will be 03h for the release revision of the chip. ...
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... For the CS4297, the ID registers contain the ASCII code for the first 3 letters of Crystal (CRY). The final byte of register ID2 is a Revision field for the part. In the case of the CS4297, the revision is 03h. Thus, register ID1 contains the value 4352h, and register ID2 contains 5903h. ...
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... Setting bit PR5 causes a global powerdown of the Codec. In this state, all internal clocks of the CS4297 are shut down. A Cold Reset is the only way to restore operation to the CS4297 in the Glo- bal Powerdown state. One important note: The CS4297 does not auto- matically mute any input or output when the pow- erdown bits are ‘ ...
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... The inputs to the output mixer are: the input mixer output, the PC Beep mono input, and the Phone mono input. All analog inputs to the CS4297, including CD_GND, should be capacitively coupled to the input pins. Since many analog levels can be as large the circuit shown in Figure 4 can be used ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 +5VA (Low Noise) or AGND - if CMOS Source 4 0.1 F 2.7 nF Figure 7. Mono Input (AFE) chip so that Modem dialing signals and pro- tocol negotiations may be monitored through the audio system. Like all other analog inputs, this pin ...
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... CrystalClear™ SoundFusion™ Audio Codec ’97 the analog section which could degrade analog per- formance. The pins AVdd1 and AVdd2 supply power to all the analog circuitry on the CS4297. This 5 Volt analog supply should be generated from a voltage regulator (7805 type) connected to a +12 Volt supply ...
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... To +5VA 0.1 µF Y5V AVss2 GROUNDING AND LAYOUT Figure 10 is the suggested layout for the CS4297. The decoupling capacitors should be located phys- ically as close to the pins as possible. Also note the routing of the REFFLT decoupling capacitors and the isolation of that ground strip strongly recommended that the device be locat locally separate analog ground plane ...
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... In to Line Out) and the microphone in- puts. Crosstalk plots and the noise floor FFT plots of the DACs, the analog mixer and the muted noise floor of the CS4297 are also included. All plots were taken on a CRD4297-1 with a CS4297-KQ Codec. ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 1 0.8 0.6 0.4 0.2 -0 -0.2 -0.4 -0.6 -0.8 20 100 1 k Frequency (Hz) Figure 11. ADC Frequency Response 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 100 1 k Frequency (Hz) Figure 13. ADC DR vs. Frequency DS242F5 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 100 Figure 12. ADC THD+N vs. Frequency 1 0 ...
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... CrystalClear™ SoundFusion™ Audio Codec ’97 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100 Figure 16. DAC DR vs. Frequency 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100 Figure 18. Mixer THD+N vs. Frequency CS4297 Frequency (Hz Frequency (Hz) DS242F5 ...
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... CS4297 CrystalClear™ SoundFusion™ Audio Codec ’97 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 100 1 k Frequency (Hz) Figure 19. Mixer DR vs. Frequency 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 100 1 k Frequency (Hz) Figure 21. Microphone THD+N vs. Frequency DS242F5 1 0.8 0.6 0.4 0.2 -0 -0.2 -0.4 -0.6 -0 100 Figure 20. Microphone Frequency Response ...
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... Figure 24. DAC Noise Floor FFT 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 100 Figure 26. Muted Noise Floor FFT CS4297 Frequency (Hz Frequency (Hz) DS242F5 ...
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... SYNC - AC-link Serial Port Sync pulse, Input This signal is the serial port timing signal for the AC-link of the CS4297. Its period is the reciprocal of the sample rate of the CS4297, 48 kHz. This signal is generated by the AC’97 Controller and is synchronous to BIT_CLK ...
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... SDATA_OUT - AC-link Serial Data Input Stream to AC’97, Input This input signal transmits the control information and digital audio output streams to be sent to the DACs. The data is clocked into the CS4297 on the falling edge of BIT_CLK. A series terminating resistor of 47 input. SDATA_IN - AC-link Serial Data Output Stream from AC’97, Output This output signal transmits the status information and digital audio input streams from the ADCs ...
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... Vrefout pin or AC coupled to Analog ground. VIDEO_L and VIDEO_R - Analog Video Audio Source, Inputs These inputs form a stereo input pair to the CS4297 intended to be used for the audio signal output of a video device. The maximum allowable input inputs are internally biased at the Vrefout voltage reference ...
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... AFLT2 - Right Channel Antialiasing Filter Input This pin needs a 390 pF NPO capacitor attached to analog ground. 42 CrystalClear™ SoundFusion™ Audio Codec ’97 and is internally biased at the Vrefout voltage reference RMS and is internally biased at the Vrefout voltage reference RMS CS4297 and is RMS DS242F5 ...
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... DVdd1, DVdd2 - Digital Supply Voltage These pins provide the digital supply voltage for the AC-link section of the CS4297. These pins may be tied digital or to +3.3 V digital. The CS4297 and digital controller’s AC-link should share a common digital supply DVss1, DVss2 - Digital Ground These pins are the digital ground connection for the AC-link section of the CS4297 ...
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... CS4297 A A1 MILLIMETERS MIN MAX ---- 1.600 0.150 0.270 9.300 7.100 9.300 7.100 0.600 0.750 7.000° DS242F5 ...
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Notes • ...
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