SC16C554DBIA68 NXP Semiconductors, SC16C554DBIA68 Datasheet

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SC16C554DBIA68

Manufacturer Part Number
SC16C554DBIA68
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C554DBIA68

Dc
0733

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1. General description
2. Features
The SC16C554B/554DB is a 4-channel Universal Asynchronous Receiver and
Transmitter (QUART) used for serial data communications. Its principal function is to
convert parallel data into serial data and vice versa. The UART can handle serial data
rates up to 5 Mbit/s. It comes with an Intel or Motorola interface.
The SC16C554B/554DB is pin compatible with the ST16C554 and TL16C554 and it will
power-up to be functionally equivalent to the 16C454. Programming of control registers
enables the added features of the SC16C554B/554DB. Some of these added features are
the 16-byte receive and transmit FIFOs, four receive trigger levels. The
SC16C554B/554DB also provides DMA mode data transfers through FIFO trigger levels
and the TXRDY and RXRDY signals. (TXRDY and RXRDY signals are not available in the
HVQFN48 package.) On-board status registers provide the user with error indications,
operational status, and modem interface control. System interrupts may be tailored to
meet user requirements. An internal loop-back capability allows on-board diagnostics.
The SC16C554B/554DB operates at 5 V, 3.3 V and 2.5 V, and the industrial temperature
range, and is available in plastic PLCC68, LQFP64, LQFP80, and HVQFN48 packages.
On the HVQFN48 package only, channel C has all the modem pins. Channels A and B
have only RTS and CTS pins and channel D does not have any modem pin.
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte
FIFOs
Rev. 03 — 1 September 2005
4 channel UART
5 V, 3.3 V and 2.5 V operation
Industrial temperature range ( 40 C to +85 C)
The SC16C554B is pin and software compatible with the industry-standard
ST16C454/554, ST68C454/554, ST16C554, TL16C554
The SC16C554DB is pin and software compatible with ST16C554D, and software
compatible with ST16C454/554, ST16C554, TL16C554
Up to 5 Mbit/s data rate at 5 V and 3.3 V, and 3 Mbit/s at 2.5 V
5 V tolerant inputs
16-byte transmit FIFO
16-byte receive FIFO with error flags
Programmable auto-RTS and auto-CTS
Automatic hardware flow control (RTS/CTS)
Software selectable baud rate generator
In auto-CTS mode, CTS controls transmitter
In auto-RTS mode, RxFIFO contents and threshold control RTS
Product data sheet

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SC16C554DBIA68 Summary of contents

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SC16C554B/554DB 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs Rev. 03 — 1 September 2005 1. General description The SC16C554B/554DB is a 4-channel Universal Asynchronous Receiver and Transmitter (QUART) used for serial data ...

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... Type number Package Name SC16C554BIB64 LQFP64 SC16C554BIB80 LQFP80 SC16C554BIBM LQFP64 SC16C554BIBS HVQFN48 SC16C554DBIA68 PLCC68 SC16C554DBIB64 LQFP64 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs 2-stop bit 2 Description plastic low profile quad flat package; 64 leads; body 10 plastic low profi ...

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Philips Semiconductors 4. Block diagram SC16C554B/554DB DATA BUS IOR AND IOW CONTROL RESET LOGIC REGISTER SELECT CSA to CSD LOGIC 16/68 INTA to INTD TXRDY RXRDY INTERRUPT CONTROL LOGIC INTSEL Fig 1. Block diagram ...

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Philips Semiconductors SC16C554B/554DB DATA BUS AND R/W CONTROL RESET LOGIC REGISTER SELECT CS LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 2. Block diagram of SC16C554B/554DB (68 mode) SC16C554B_554DB_3 Product data sheet SC16C554B/554DB ...

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... Fig 3. Pin configuration for PLCC68 (16 mode) SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs DSRA 10 11 CTSA DTRA RTSA 15 INTA CSA 16 TXA 17 SC16C554DBIA68 18 IOW 16 mode TXB 19 CSB 20 INTB 21 22 RTSB GND 23 DTRB 24 25 CTSB 26 DSRB Rev. 03 — 1 September 2005 ...

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... Fig 4. Pin configuration for PLCC68 (68 mode) SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs DSRA 10 CTSA 11 12 DTRA RTSA 14 15 IRQ 16 CS TXA 17 SC16C554DBIA68 R mode 19 TXB RTSB 23 GND DTRB 24 CTSB 25 26 DSRB Rev. 03 — 1 September 2005 ...

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Philips Semiconductors 5.1.2 LQFP64 Fig 5. Pin configuration for LQFP64 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs DSRA 1 2 CTSA DTRA RTSA ...

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Philips Semiconductors 5.1.3 LQFP80 CDD RXD V INTSEL GND RXA CDA Fig 6. Pin configuration for LQFP80 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs 1 n.c. 2 RID ...

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Philips Semiconductors 5.1.4 HVQFN48 Fig 7. Pin configuration for HVQFN (16 mode) Fig 8. Pin configuration for HVQFN (68 mode) SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs terminal ...

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Philips Semiconductors 5.2 Pin description Table 2: Pin description Symbol Pin PLCC68 LQFP64 LQFP80 HVQFN48 16/ CDA 9 64 CDB 27 18 CDC ...

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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC68 LQFP64 LQFP80 HVQFN48 CTSA 11 2 CTSB 25 16 CTSC 45 33 CTSD ...

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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC68 LQFP64 LQFP80 HVQFN48 INTSEL 65 - IOR 52 40 IOW 18 9 IRQ 15 - n.c. 21, 49, - 52, 54, 55, 65 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 ...

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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC68 LQFP64 LQFP80 HVQFN48 RESET 37 27 (RESET) RIA 8 63 RIB 28 19 RIC 42 30 RID 62 50 RTSA 14 5 RTSB 22 13 RTSC 48 36 RTSD 56 ...

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Philips Semiconductors Table 2: Pin description …continued Symbol Pin PLCC68 LQFP64 LQFP80 HVQFN48 TXA 17 8 TXB 19 10 TXC 51 39 TXD 53 41 TXRDY 13, 30, 4, 21, CC 47, 64 35, 52 XTAL1 35 ...

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Philips Semiconductors 6. Functional description The SC16C554B/554DB provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...

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Philips Semiconductors 6.1 Interface options Two user interface modes are selectable for the PLCC68 package. These interface modes are designated as the ‘16 mode’ and the ‘68 mode’. This nomenclature corresponds to the early 16C454/554 and 68C454/554 package interfaces respectively. ...

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Philips Semiconductors 6.2 Internal registers The SC16C554B/554DB provides 12 internal registers for monitoring and control. These registers are shown in (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO Control Register (FCR), line status and control registers (LCR/LSR), modem status ...

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Philips Semiconductors 6.4 Autoflow control (see Autoflow control is comprised of auto-CTS and auto-RTS. With auto-CTS, the CTS input must be active before the transmitter FIFO can emit data. With auto-RTS, RTS becomes active when the receiver needs more data ...

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Philips Semiconductors Remark: Auto-CTS is not supported in channel D of the HVQFN48 package, therefore MCR[5] of channel D should not be written. 6.4.3 Enabling autoflow control and auto-CTS Autoflow control is enabled by setting MCR[5] and MCR[1]. Table 7: ...

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Philips Semiconductors RX byte 14 RTS IOR (RD RBR) (1) RTS is de-asserted when the receiver receives the first data bit of the sixteenth byte. The receive FIFO is full after finishing the sixteenth byte. (2) RTS is asserted again ...

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Philips Semiconductors A single baud rate generator is provided for the transmitter and receiver, allowing independent TX/RX channel control. The programmable Baud Rate Generator is capable of accepting an input clock MHz (for 3.3 V and 5 ...

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Philips Semiconductors 6.7 DMA operation The SC16C554B/554DB FIFO trigger level provides additional flexibility to the user for block mode operation. LSR[5:6] provide an indication when the transmitter is empty or has an empty location(s). The user can optionally operate the ...

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Philips Semiconductors SC16C554B/554DB DATA BUS IOR AND IOW CONTROL RESET LOGIC REGISTER SELECT CSA to CSD LOGIC INTA to INTD INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 14. Internal loop-back mode diagram (16 mode) SC16C554B_554DB_3 ...

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Philips Semiconductors SC16C554B/554DB (HVQFN48 DATA BUS IOR AND IOW CONTROL RESET LOGIC REGISTER SELECT CSA to CSD LOGIC INTERRUPT INTA to INTD CONTROL LOGIC Fig 15. Internal loop-back mode diagram (16 mode) for HVQFN48 ...

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Philips Semiconductors SC16C554B/554DB DATA BUS R/W AND RESET CONTROL LOGIC REGISTER SELECT CS LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 16. Internal loop-back mode diagram (68 mode) SC16C554B_554DB_3 Product data sheet SC16C554B/554DB ...

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Philips Semiconductors SC16C554B/554DB (HVQFN48 DATA BUS R/W AND RESET CONTROL LOGIC REGISTER SELECT CS LOGIC 16/68 INTERRUPT IRQ CONTROL LOGIC Fig 17. Internal loop-back mode diagram (68 mode) for HVQFN48 package SC16C554B_554DB_3 Product data ...

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Philips Semiconductors 7. Register descriptions Table 9 The assigned bit functions are more fully defined in Table 9: SC16C554B/554DB internal registers Register Default [2] General Register set RHR THR XX ...

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Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...

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Philips Semiconductors 7.2.1 IER versus Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will reflect the following: • The receive ...

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Philips Semiconductors 7.3.2 FIFO mode Table 11: Bit 7:6 5 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs FIFO Control Register bits description Symbol Description ...

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Philips Semiconductors Table 12: FCR[ 7.4 Interrupt Status Register (ISR) The SC16C554B/554DB provides four levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with four interrupt status bits. ...

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Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...

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Philips Semiconductors Table 16: LCR[ Table 17: LCR[ Table 18: LCR[ SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with ...

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Philips Semiconductors 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 19: Bit 7 SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V ...

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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C554B/554DB and the CPU. Table 20: Bit SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V ...

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Philips Semiconductors 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C554B/554DB is connected. Four bits of this register are used to indicate ...

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Philips Semiconductors 7.9 Scratchpad Register (SPR) The SC16C554B/554DB provides a temporary data register to store 8 bits of user information. 7.10 SC16C554B/554DB external reset conditions Table 22: Register IER ISR LCR MCR LSR MSR FCR Table 23: Output TXA, TXB, ...

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Philips Semiconductors 9. Static characteristics Table 25: Static characteristics +85 C; tolerance of V amb Symbol Parameter V LOW-level clock input IL(CK) voltage V HIGH-level clock input IH(CK) voltage V LOW-level input voltage IL (except ...

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Philips Semiconductors 10. Dynamic characteristics Table 26: Dynamic characteristics +85 C; tolerance of V amb Symbol Parameter clock pulse duration oscillator/clock frequency XTAL t address setup time 6s t ...

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Philips Semiconductors Table 26: Dynamic characteristics +85 C; tolerance of V amb Symbol Parameter t delay from start to reset 28d TXRDY t address setup time 30s t chip select strobe width 30w t address ...

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Philips Semiconductors 30s CS t 32s R Fig 19. General write timing in 68 mode IOW Fig 20. General write timing in 16 mode ...

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Philips Semiconductors IOR Fig 21. General read timing in 16 mode active IOW RTS change of state DTR CD CTS DSR INT IOR RI Fig 22. Modem input/output timing SC16C554B_554DB_3 Product ...

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Philips Semiconductors EXTERNAL CLOCK ------- XTAL t 3w Fig 23. External clock timing RX INT IOR Fig 24. Receive timing SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with ...

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Philips Semiconductors RX RXRDY IOR Fig 25. Receive ready timing in non-FIFO mode RX RXRDY IOR Fig 26. Receive ready timing in FIFO mode SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) ...

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Philips Semiconductors TX INT active IOW Fig 27. Transmit timing TX IOW active byte #1 t 27d TXRDY Fig 28. Transmit ready timing in non-FIFO mode SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V ...

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Philips Semiconductors TX IOW active byte #16 TXRDY Fig 29. Transmit ready timing in FIFO mode (DMA mode ‘1’) SC16C554B_554DB_3 Product data sheet 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte ...

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Philips Semiconductors 11. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...

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Philips Semiconductors LQFP80: plastic low profile quad flat package; 80 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT ...

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Philips Semiconductors LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT ...

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Philips Semiconductors HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm ...

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Philips Semiconductors PLCC68: plastic leaded chip carrier; 68 leads pin 1 index DIMENSIONS (mm dimensions are derived from the original inch dimensions UNIT ...

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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...

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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...

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Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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