MBM29F400BC-70PF Fujitsu, MBM29F400BC-70PF Datasheet

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MBM29F400BC-70PF

Manufacturer Part Number
MBM29F400BC-70PF
Description
MBM29F400BC-70PF4M (512K X 8/256K X 16) BIT
Manufacturer
Fujitsu
Datasheet

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MBM29F400BC-70PFTN-SFLE1
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FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
4M (512K
MBM29F400TC
Embedded Erase
FEATURES
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Low Vcc write inhibit
• Erase Suspend/Resume
• Hardware RESET pin
• Sector protection
• Temporary sector unprotection
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
55 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
Suspends the erase operation to allow a read in another sector within the same device
Resets internal state machine to the read mode
Hardware method disables any combination of sectors from write or erase operations
Temporary sector unprotection via the RESET pin.
TM
and Embedded Program
TM
Algorithms
TM
Algorithms
3.2 V
TM
are trademarks of Advanced Micro Devices, Inc.
-55/-70/-90
2
PROMs
8/256K
/MBM29F400BC
16) BIT
DS05-20851-4E
-55/-70/-90

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MBM29F400BC-70PF Summary of contents

Page 1

... Resets internal state machine to the read mode • Sector protection Hardware method disables any combination of sectors from write or erase operations • Temporary sector unprotection Temporary sector unprotection via the RESET pin. Embedded Erase TM and Embedded Program 8/256K /MBM29F400BC -55/-70/-90 2 PROMs TM are trademarks of Advanced Micro Devices, Inc. DS05-20851-4E 16) BIT -55/-70/-90 ...

Page 2

... MBM29F400TC -55/-70/-90 PACKAGE 48-pin TSOP (I) Marking Side (FPT-48P-M19) 2 /MBM29F400BC Marking Side (FPT-48P-M20) -55/-70/-90 44-pin SOP Marking Side (FPT-44P-M16) ...

Page 3

... Fujitsu’s Flash technology combines years of EPROM and E of quality, reliability, and cost effectiveness. The MBM29F400TC/BC memory electrically erase the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection. /MBM29F400BC -55/-70/- ...

Page 4

... MBM29F400BC Sector Architecture -55/-70/- 16) 7FFFFH 3FFFFH 6FFFFH 37FFFH 5FFFFH 2FFFFH 4FFFFH 27FFFH 3FFFFH 1FFFFH 2FFFFH 17FFFH 1FFFFH 0FFFFH 0FFFFH ...

Page 5

... Buffer State Control BYTE RESET Command Register CE OE Low V Detector /MBM29F400BC -55/-70/-90 MBM29F400TC/MBM29F400BC -55 — — - RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch ...

Page 6

... N.C. 13 MBM29F400TC/MBM29F400BC RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29F400BC TSOP ( BYTE ...

Page 7

... MBM29F400TC LOGIC SYMBOL RY/BY RESET BYTE /MBM29F400BC -55/-70/-90 Table 1 MBM29F400TC/BC Pin Configuration Pin Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable OE Write Enable WE Ready-Busy Output RY/BY Hardware Reset Pin/ ...

Page 8

... Reset (Hardware)/Standby Legend Notes: 1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 7. 2. Refer to the section on Sector Protection can /MBM29F400BC ...

Page 9

... Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F400 T C -55 DEVICE NUMBER/DESCRIPTION MBM29F400 4Mega-bit (512K 5.0 V-only Read, Write, and Erase /MBM29F400BC -55/-70/-90 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP (I)) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP (I)) Reverse Pinout PF = ...

Page 10

... (MBM29F400TC = 23H and MBM29F400BC = ABH for 8 mode; MBM29F400TC = 2223H and MBM29F400BC = 22ABH for 16 mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers for manufacturer and device will exhibit odd parity with DQ ...

Page 11

... Sector Protection The MBM29F400TC/BC features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 10). The sector protection feature is enabled using programming equipment at the user’s site. The device is shipped with all sectors unprotected. /MBM29F400BC -55/-70/- ...

Page 12

... The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once the taken away from the RESET pin, all the previously protected sectors will be protected again. Refer to Figures 17 and 24. 12 /MBM29F400BC -55/-70/-90 on address pin ...

Page 13

... Sector Address Tables (MBM29F400BC ...

Page 14

... The read or eset operation is initiated by writing the read/reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the command register contents are altered. 14 /MBM29F400BC -55/-70/-90 MBM29F400TC/BC Command Definitions Second ...

Page 15

... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16 (XX02H for 8) returns the device code (MBM29F400TC = 23H and MBM29F400BC = ABH for 8 mode; MBM29F400TC = 2223H and MBM29F400BC = 22ABH for 16 mode). (See Tables 4.1 and 4.2.) ...

Page 16

... Sector Erase time-out results in immediate termination of the time-out period and suspension of the erase operation. Writing the Erase Resume command resumes the erase operation. The addresses are “don’t cares” when writing the Erase Suspend or Erase Resume command. 16 /MBM29F400BC -55/-70/-90 , Sector Erase Timer.) Any command other than Sector 3 7 ...

Page 17

... are “DON’T CARES” because there is for 8 15 /MBM29F400BC -55/-70/-90 will stop toggling. The user must use the address of the 6 to determine if the erase operation has been suspended. Further writes 7 to toggle. (See the section toggle ...

Page 18

... This is a failure condition which indicates that the program or erase 5 cycle was not successfully completed. Data Polling is the only operating function of the devices under this 18 /MBM29F400BC -55/-70/-90 . Upon completion of the Embedded Program 7 ) may change asynchronously while the output ...

Page 19

... For example, DQ and DQ can be used together to determine the erase-suspend-read mode ( does not). See also Table 8 and Figure 22. 6 /MBM29F400BC -55/-70/-90 never stops toggling. Once the device has exceeded timing limits, the toggle during the Embedded Erase Algorithm. If the 2 bit ...

Page 20

... The device also incorporate several features to prevent inadvertent write cycles resulting form V power-down transitions or system noise. 20 /MBM29F400BC -55/-70/-90 ) for at least 500 ns in order to properly reset the internal state machine bits are tri-stated ...

Page 21

... logical one. Power-Up Write Inhibit Power-up of the device with The internal state machine is automatically reset to the read mode on power-up. /MBM29F400BC -55/-70/-90 power-up and power-down, a write cycle is locked out for the command register is disabled and all internal program/erase circuits LKO is above 3 ...

Page 22

... Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 22 /MBM29F400BC -55/-70/-90 , OE, RESET (Note 1) ................... –2 +7 OE, RESET pins are –0.5 V. During voltage transitions – ...

Page 23

... V –2.0 V Figure +2.0 V Figure 2 +14.0 V +13 +0 Note: This waveform is applied for A Figure 3 /MBM29F400BC -55/-70/- Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform -55/-70/-90 23 ...

Page 24

... DC operating current and the frequency dependent component CC (at 6 MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function not exceed /MBM29F400BC -55/-70/-90 Test Conditions ...

Page 25

... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes including jig capacitance 100 pF including jig capacitance L /MBM29F400BC -55/-70/-90 Test Setup — Min Max Max. IL — ...

Page 26

... Write Pulse Width (Note 2) WPP — Setup Time to WE Active (Note 2) OESP — Setup Time to WE Active (Note 2) CSP — t Recover Time from RY/ /MBM29F400BC -55/-70/-90 Description Min. Min. Min. Min. Min. Min. Read Min. Toggle and Data Polling Min. Min. Min. ...

Page 27

... BYTE Switching High to Output Active FHQV — t Program/Erase Valid to RY/BY Delay BUSY Delay Time from Embedded Output — t EOE Enable Notes: 1. This does not include the preprogramming time. 2. These timing is for Sector Protection operation. /MBM29F400BC -55/-70/-90 Description -55 Min. 500 Min. 50 Max. 30 Min. 30 Max. ...

Page 28

... MBM29F400TC SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses High-Z Outputs Figure 5 28 /MBM29F400BC -55/-70/-90 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 29

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 6 AC Waveforms for Alternate WE Controlled Program Operations /MBM29F400BC -55/-70/-90 Data Polling PA t WHWH1 ...

Page 30

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 7 AC Waveforms for Alternate CE Controlled Program Operations 30 /MBM29F400BC -55/-70/-90 Data Polling ...

Page 31

... VCS Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the Figure 8 AC Waveforms Chip/Sector Erase Operations /MBM29F400BC -55/-70/- 2AAH 555H 555H 55H AAH 55H 80H 16 mode. The addresses differ from ...

Page 32

... CE t OEH WE t OES OE Data *DQ stops toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit I during Embedded Algorithm Operations 32 /MBM29F400BC -55/-70/- OEH WHWH1 Output Flag Toggle DQ = Toggle ...

Page 33

... MBM29F400TC -55/-70/- RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET t RY/BY Figure 12 RESET/RY/BY Timing Diagram /MBM29F400BC The rising edge of the last WE signal Entire programming or erase operations t BUSY READY -55/-70/-90 33 ...

Page 34

... ELFH Figure 13 CE BYTE t ELFL Figure BYTE Figure 15 34 /MBM29F400BC -55/-70/-90 Data Output Data Output ( ( FHQV A -1 Timing Diagram for Word Mode Configuration Data Output Data Output ( ( ...

Page 35

... VLHT WE t CSP CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode Figure 16 AC Waveforms for Sector Protection Timing Diagram /MBM29F400BC -55/-70/- WPP OESP VLHT t VLHT -55/-70/-90 SAY 01H ...

Page 36

... Erase Suspend Toggle DQ and with OE Note read from the erase-suspended sector /MBM29F400BC -55/-70/-90 t Program or Erase Command Sequence VLHT Unprotection period Temporary Sector Unprotection Timing Diagram Enter Erase Suspend Program Erase Erase Suspend Read Suspend Program Figure ...

Page 37

... MBM29F400TC EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from 8 mode. Figure 19 /MBM29F400BC -55/-70/-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...

Page 38

... Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H * : The sequence is applied for The addresses differ from 38 /MBM29F400BC -55/-70/-90 Start Write Erase Command Sequece (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence ...

Page 39

... MBM29F400TC No Note rechecked even Figure 21 /MBM29F400BC -55/-70/- Byte address for programming = Any of the sector addresses Start within the sector being erased during sector erase operation = Any of the sector addresses Read Byte within the sector not being ( protected during chip erase Addr ...

Page 40

... MBM29F400TC Note rechecked even changing to “1” /MBM29F400BC -55/-70/-90 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “ ...

Page 41

... MBM29F400TC Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed * : byte mode Figure 23 /MBM29F400BC -55/-70/-90 Start Setup Sector Addr 16 PLSCNT = RESET = Activate WE Pulse ...

Page 42

... MBM29F400TC Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 24 42 /MBM29F400BC -55/-70/-90 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) Temporary Sector Unprotection Algorithm -55/-70/-90 ...

Page 43

... Note: Test conditions T = 25° 1.0 MHz A SOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A /MBM29F400BC -55/-70/-90 Limits Min. Typ. Max. — — 16 200 — 8 150 — 4.2 10 100,000 — ...

Page 44

... FUJITSU LIMITED F48029S-2C /MBM29F400BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 25 0.50(.0197) TYP 0.15±0.05 (.006±.002) 0.50±0.10 (.020±.004) -55/-70/-90 0 ...

Page 45

... INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C-2 C /MBM29F400BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 0.15(.006) 0.25(.010) 25 0.50±0.10 (.020±.004) 0.15±0.10 0.20±0.10 (.006±.002) (.008± ...

Page 46

... MBM29F400TC (Continued) 44-pin plastic SOP (FPT-44P-M16) 28.45 44 INDEX LEAD No. 1 1.27(.050)TYP 0.10(.004) 26.67(1.050)REF 1995 FUJITSU LIMITED F44023S-3C /MBM29F400BC -55/-70/-90 +0.25 +.010 1.120 −0.20 −.008 23 13.00±0.10 (.512±.004) "A" 22 +0.10 0.40 0.05(.002)MIN −0.05 Ø0.13(.005) M +.004 (Stand off) .016 −.002 -55/-70/-90 2.50(.098)MAX (Mounting height) 0.80± ...

Page 47

... Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9903 FUJITSU LIMITED Printed in Japan /MBM29F400BC -55/-70/-90 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...

Page 48

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