AD9779BSV Analog Devices, AD9779BSV Datasheet
AD9779BSV
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AD9779BSV Summary of contents
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... Rev. PrD Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...
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AD9779 TABLE OF CONTENTS Specifications............................................................................................3 DC SPECIFICATIONS ......................................................................3 DIGITAL SPECIFICATIONS............................................................4 AC SPECIFICATIONS.......................................................................4 Pin Function Descriptions .....................................................................5 Pin Configuration....................................................................................6 Interpolation Filter Coefficients............................................................7 INTERPOLATION Filter RESPONSE CURVES................................8 CHARACTERIZATION DATA ............................................................9 General Description ..............................................................................12 Serial Peripheral Interface................................................................12 General Operation of the Serial Interface......................................12 ...
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Preliminary Technical Data 1 SPECIFICATIONS DC SPECIFICATIONS (VDD33 = 3.3 V, VDD18 = 1.8 V, MAXIMUM SAMPLE RATE, UNLESS OTHERWISE NOTED) Parameter RESOLUTION Integral Nonlinearity (DNL) ACCURACY Differential Nonlinearity (INL) Offset Error Gain Error (With Internal Reference) Gain Error (Without ...
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AD9779 DIGITAL SPECIFICATIONS (VDD33 = 3.3 V, VDD18 = 1.8 V, MAXIMUM SAMPLE RATE, UNLESS OTHERWISE NOTED) Parameter Differential peak-to-peak Voltage DAC CLOCK INPUT Common Mode Voltage (CLK+, CLK-) Maximum Clock Rate Maximum Clock Rate (SCLK) SERIAL PERIPHERAL Maximum Pulse ...
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Preliminary Technical Data PIN FUNCTION DESCRIPTIONS Pin Name Description No. 1 VDDC18 1.8 V Clock Supply 2 VDDC18 1.8 V Clock Supply 3 VSSC Clock Common 4 VSSC Clock Common 5 CLK+ Differential Clock Input 6 CLK- Differential Clock Input ...
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AD9779 PIN CONFIGURATION VDDC18 1 VDDC18 2 VSSC 3 VSSC 4 CLK+ 5 CLK- 6 VSSC 7 VSSC 8 VDDC18 9 VDDC18 10 VSSC 11 VSSC 12 SYNC_I+ 13 SYNC_I- 14 VSSD 15 VDDD33 16 P1D<15> 17 P1D<14> 18 P1D<13> ...
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Preliminary Technical Data INTERPOLATION FILTER COEFFICIENTS Table 5: Halfband Filter 1 Lower Upper Integer Coefficient Coefficient Value H(1) H(55) -4 H(2) H(54) 0 H(3) H(53) 13 H(4) H(52) 0 H(5) H(51) -34 H(6) H(50) 0 H(7) H(49) 72 H(8) H(48) ...
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AD9779 INTERPOLATION FILTER RESPONSE CURVES 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 - Figure 3. AD9779 2x Interpolation, Low Pass Response to ±4x Input Data Rate (Dotted Lines Indicate 1dBRoll-Off) ...
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Preliminary Technical Data CHARACTERIZATION DATA 8192 16384 24576 32768 40960 Code Figure 6. AD9779 Typical INL 2 1.5 1 0 8192 16384 24576 ...
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AD9779 100.0 F =200MSPS D ATA 90.0 80.0 F =160MSPS D ATA 70.0 60.0 50 Fout - MHz Figure 12. Third Order IMD vs. F OUT 100.0 F =200MSPS D ATA 90.0 80.0 F =160MSPS D ATA ...
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Preliminary Technical Data -90 -85 F -80 -75 -70 F =61.44MSPS -65 D ATA -60 -55 - 100 120 140 160 180 200 220 240 260 280 300 Fout - Figure 18. ...
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AD9779 GENERAL DESCRIPTION The AD9779 combines many features which make it make it a very attractive DAC for wired and wireless communications systems. The dual digital signal path and dual DAC structure allow an easy interface with common quadrature modulators ...
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Preliminary Technical Data this pin. However, this pin can be used as a bidirectional data line. The configuration of this pin is controlled by Bit 7 of register address 00h. The default is Logic 0, which configures the SDIO pin ...
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AD9779 SPI Register Map Register Address Bit 7 Name Comm 00h 00 SDIO Register Bidirectional Digital 01h 01 Filter Interpolation Factor <1: 0> Control Register 02h 02 Data Format Sync 03h 03 Data Delay Mode <1:0> Control 04h 04 Sync ...
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Preliminary Technical Data Aux 2 DAC 10h 15 Auxiliary DAC2 Data <7:0> Control Register 11h 16 Auxiliary DAC2 Sign 12h 17 Cross Updel <7:0> Cross 13h 18 Cross Dndel <7:0> Register 14h 19 Cross Clock Divide <3:0> 15h 20 Cross ...
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AD9779 Register (hex) Bits Name 00 7 SDIO Bidirectional Comm Register 6 LSB/MSB First 5 Software RESET 4 Power Down Mode 3 Auto Power Down Enable 1 PLL LOCK (read only) 7:6 Filter Interpolation 01 Rate Digital Path Filter Control ...
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Preliminary Technical Data 06 7 Data Delay Error (read only) IRQ Status 6 Chip Synchronization Delay Error (read only) 5 Cross Control Error (read only) 3 Data Delay Error Enable 2 Chip Synchronization Error Enable 1 Cross Control Error Enable ...
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AD9779 0D 7 Aux DAC1 Sign Auxiliary DAC1 Control and Data 6 Aux DAC1 Direction 5 Aux DAC1 Sleep 1:0 Aux DAC1 Gain Adjustment 0E 7:0 QDAC Gain Adjustment QDAC Gain 7 QDAC Sleep 0F QDAC Gain and Control 6 ...
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Preliminary Technical Data 1A 7 MISR Enable MISR Control 6 MISR IQ Select 5 MISR Samples 3 Internal Data Enable 2:0 Test Mode 1B 7:0 MISR Signature MISR Signature Register 1 7:0 MISR Signature 1C MISR Signature Register 2 7:0 ...
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AD9779 Interp. Filter Filter1 mode Filter2 mode (Mode_F1) (Mode_F2) Factor Mode <7:6> <5:2> 8 00h 01h 02h 03h 04h 05h 06h 2 ...
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Preliminary Technical Data PLL Frequency Band Select PLL Band Select Value Frequency in MHz 11111 (31) 804 – 850 11110 (30) 827 – 875 11101 (29) 850 – 899 11100 (28) 875 – 925 11011 (27) 899 – 951 11010 ...
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AD9779 Internal Reference/Full Scale Current Generation Full scale current on the AD9779 IDAC and QDAC can be set from 10 to 30ma. Initially, the 1.2V bandgap reference is used to set up a current in an external resistor connected to ...
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Preliminary Technical Data The power down bit (register 00h, bit 4) controls the power down function for the digital section of the AD9779. The power down function in bit 4 works in conjunction with TxEnable (pin 39) according to the ...
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AD9779 Refe rence Clock DATA CLK out Input Data Figure 34. Timing Specifications for AD9779, PLL Enabled, Reference Clock = 2x Input Sample Rate Refe rence Clock DATA CLK out Input Data Figure 35. Timing Specifications for AD9779, PLL Enabled, ...
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Preliminary Technical Data Interpolation Filter Architecture The AD9779 can provide up to 8× interpolation or disable the interpolation filters entirely. The coefficients of the low pass filters and the inverse sinc filter are given in Table 5, Table 6, Table ...
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AD9779 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 - Figure 44. Interpolation/Modulation Combination of f Filter in Odd Mode 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 ...
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Preliminary Technical Data EVALUATION BOARD SCHEMATICS Figure 47. AD9779 Eval Board, Rev B , Power Supply Decoupling and SPI Interface Rev. PrD | Page AD9779 ...
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AD9779 Figure 48. AD9779 Eval Board, Rev B , Circuitry Local to AD9779 Rev. PrD | Page Preliminary Technical Data ...
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Preliminary Technical Data Figure 49. AD9779 Eval Board, RevB , AD8349 Quadrature Modulator Rev. PrD | Page AD9779 ...
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AD9779 Figure 50. AD9779 Eval Board, RevB , DAC Clock Interface Rev. PrD | Page Preliminary Technical Data ...
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Preliminary Technical Data Figure 51. AD9779 Eval Board, RevB , Input Port 1, Digital Input Buffers Rev. PrD | Page AD9779 ...
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AD9779 Figure 52. AD9779 Eval Board, RevB , Input Port 2, Digital Input Buffers Rev. PrD | Page Preliminary Technical Data ...
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Preliminary Technical Data Outline Dimensions Rev. PrD | Page AD9779 ...
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... ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range AD9779BSV -40°C to +85°C (Ambient) AD9779/PCB 25°C (Ambient) © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05363– ...