HA9P5020-5Z Intersil, HA9P5020-5Z Datasheet - Page 10
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HA9P5020-5Z
Manufacturer Part Number
HA9P5020-5Z
Description
IC AMP VIDEO 100MHZ CFB 8-SOIC
Manufacturer
Intersil
Datasheet
1.HA9P5020-5Z.pdf
(23 pages)
Specifications of HA9P5020-5Z
Applications
Current Feedback
Number Of Circuits
1
-3db Bandwidth
100MHz
Slew Rate
1100 V/µs
Current - Supply
7.5mA
Current - Output / Channel
31.7mA
Voltage - Supply, Single/dual (±)
±4.5 V ~ 18 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HA9P5020-5Z
Manufacturer:
Intersil
Quantity:
1 684
Part Number:
HA9P5020-5Z
Manufacturer:
INTERSIL
Quantity:
20 000
Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response
illustrate the performance of the HA-5020 in various closed
loop gain configurations. Although the bandwidth dependency
on closed loop gain isn’t as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s unique
relationship between bandwidth and R
amplifiers require a feedback resistor, even for unity gain
applications, and R
compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R
for a 1000Ω R
application decreases stability, resulting in excessive peaking
and overshoot. At higher gains the amplifier is more stable, so
R
The table below lists recommended R
gains, and the expected bandwidth.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The use
of low inductance components such as chip resistors and
chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in
parallel with a small value (0.1µF) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise. Care
must also be taken to minimize the capacitance to ground seen
by the amplifier’s inverting input (-IN). The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. It is recommended that the
ground plane be removed under traces connected to -IN, and
that connections to -IN be kept as short as possible to minimize
the capacitance from this node to ground.
GAIN (A
F
can be decreased in a trade-off of stability for bandwidth.
+10
-10
+1
+2
+5
-1
CL
)
F
at a gain of +1. Decreasing R
F
, in conjunction with the internal
R
1000
1000
750
681
383
750
F
(Ω)
F
. The HA-5020 design is optimized
10
F
F
. All current feedback
values for various
BANDWIDTH
F
(MHz)
in a unity gain
100
125
95
52
65
22
HA-5020
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Enable/Disable Function
When enabled the amplifier functions as a normal current
feedback amplifier with all of the data in the electrical
specifications table being valid and applicable. When
disabled the amplifier output assumes a true high
impedance state and the supply current is reduced
significantly.
The circuit shown in Figure 7 is a simplified schematic of the
enable/disable function. The large value resistors in series
with the DISABLE pin makes it appear as a current source to
the driver. When the driver pulls this pin low current flows out
of the pin and into the driver. This current, which may be as
large as 350µA when external circuit and process variables
are at their extremes, is required to insure that point “A”
achieves the proper potential to disable the output. The
driver must have the compliance and capability of sinking all
of this current.
When V
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage. When V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than V
DISABLE INPUT
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
FIGURE 7. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE
V
ENABLE/
IN
CC
is +5V the DISABLE pin may be driven with a
RESISTOR, R
FUNCTION
+V
R
T
CC
15K
R
7
R
I
+
-
R
15K
6
D
R
1
F
R
CC
is greater than +5V
R
Q
R
8
P3
10
C
L
V
CC
OUT
1
June 5, 2006
FN2845.11
will not
.
R
Q
A
33
P18