AK4528VF AKM Semiconductor, Inc., AK4528VF Datasheet
AK4528VF
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AK4528VF Summary of contents
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ASAHI KASEI High Performance 24Bit 96kHz Audio CODEC The AK4528 is a high performance 24bit CODEC for the 96kHz recording system. The ADC has an Enhanced Dual Bit architecture with wide dynamic range. The DAC uses the new developed Advanced ...
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ASAHI KASEI Block Diagram AINL+ AINL- AINR+ AINR- VCOM AOUTL+ AOUTL- AOUTR+ AOUTR- VREF VA AGND P/S • Compatibility of AK4528 with AK4524 Function ADC S/(N+D) ADC DR, S/N Input PGA & ATT ADC Inputs Master Mode X’tal Oscillating Circuit ...
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... ASAHI KASEI Ordering Guide AK4528VF AKD4528 Pin Layout VCOM 1 AINR AINR- AINL+ 4 AINL VREF AGND P/S 9 MCLK 10 LRCK 11 BICK 12 SDTO 13 SDTI 14 MS0011-E-01 −40 ∼ +85°C 28pin VSOP (0.65mm pitch) Evaluation Board AK4528 23 Top 22 View ...
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ASAHI KASEI No. Pin Name I/O Common Voltage Output Pin, VA/2 1 VCOM O 2 AINR+ I Rch Positive Input Pin 3 AINR− I Rch Negative Input Pin 4 AINL+ I Lch Positive Input Pin 5 AINL− I Lch Negative ...
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ASAHI KASEI (AGND, DGND=0V; Note 1) Parameter Power Supplies: Analog Digital Output Buffer VD−VA Input Current, Any Pin Except Supplies Analog Input Voltage Digital Input Voltage Ambient Temperature (powered applied) Storage Temperature All voltages with respect to ground. Note: 1. ...
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ASAHI KASEI (Ta=25°C; VA, VD, VT=5.0V; AGND=DGND=0V; VREF=VA; fs=44.1kHz; Signal Frequency =1kHz; 24bit Data; Measurement frequency = 20Hz ∼ 20kHz at fs=44.1kHz, 40Hz ∼ 40kHz at fs=96kHz; unless otherwise specified) Parameter Input PGA Characteristics: ADC Analog Input Characteristics: Analog Source ...
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ASAHI KASEI Parameter Power Supplies Power Supply Current Normal Operation (PDN=“H”) VA VD+VT Power-down mode (PDN=“L”) VA VD+VT Note: 7. All digital input pins are held VD or DGND. (Ta=25°C; VA, VD=4.75 ∼ 5.25V; VT=2.7 ∼ 5.25V; fs=44.1kHz; DEM=OFF) Parameter ...
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ASAHI KASEI (Ta=25°C; VA, VD=4.75 ∼ 5.25V; VT=2.7 ∼ 5.25V) Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage (Iout=−100µA) (Note 11) Low-Level Output Voltage (Iout=100µA) Input Leakage Current Note: 11. The min value is lower voltage of 2.7V ...
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ASAHI KASEI Parameter Control Interface Timing (P/S=“L”) CCLK Period CCLK Pulse Width Low Pulse Width High CDTI Setup Time CDTI Hold Time CSN “H” Time CSN “L” Time CSN “↑” to CCLK “↑” CCLK “↑” to CSN “↑” Reset Timing ...
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ASAHI KASEI LRCK tBLR BICK tLRS SDTO SDTI CSN tCSS CCLK CDTI CSN CCLK CDTI D3 PDN MS0011-E-01 tLRB tSDS tSDH Audio Interface Timing tCCKL tCCKH tCDS tCDH C1 C0 R/W WRITE Command Input Timing WRITE Data ...
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ASAHI KASEI System Clock Input The external clocks, which are required to AK4528, are MCLK, BICK and LRCK. MCLK should be synchronized with LRCK but the phase is not critical. The frequency of MCLK is set by CMODE, CKS0-1 and ...
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ASAHI KASEI Audio Serial Interface Format In case of serial mode, the DIF0-2 bits as shown in Table 4 support five serial formats. In case of parallel mode, two formats (Mode 2 and 3) are supported by DIF pin (Table ...
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ASAHI KASEI LRCK BICK(64fs) SDTO( SDTI( 23:MSB, 0:LSB Lch Data LRCK BICK(64fs) SDTO( SDTI( ...
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ASAHI KASEI Parallel/Serial Mode Control When P/S= “H”, AK4528 is in parallel mode. The audio interface format is selected by DIF pin, and DFS and CK0-1 pins select the frequency of MCLK. When P/S= “L”, AK4528 is in serial mode. ...
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ASAHI KASEI Soft Mute Operation Soft mute operation is performed at digital domain. When SMUTE goes “1”, the output signal is attenuated by −∞ during 1024 LRCK cycles. When SMUTE is returned to “0”, the mute is cancelled and the ...
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ASAHI KASEI Power Down & Reset The ADC and DAC of AK4528 are placed in the power-down mode by bringing a power down pin (PDN)=“L” and each digital filter is also reset at the same time. The internal register values ...
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ASAHI KASEI In case of parallel mode, both ADC and DAC are powered up with releasing internal reset state when PDN is set to “H”. Therefore each outputs start to output at once. However the initialization of ADC/DAC, and the ...
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ASAHI KASEI Serial Control Interface The serial control interface is enabled by the P/S pin = “L”. The internal registers are written by the 3-wire µP interface pins: CSN, CCLK, CDTI. The data on this interface consists of Chip address ...
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ASAHI KASEI Register Map Addr Register Name D7 00H Power Down Control 01H Reset Control TE7 02H Clock and Format Control DIF2 03H Deem and Volume Control SMUTE 04H Lch ATT Control 05H Rch ATT Control Note: For address from ...
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ASAHI KASEI Register Definitions Addr Register Name 00H Power Down Control default PWDA: DAC power down 0: Power down 1: Power up Only DAC section is powered down by “0” and then the AOUTs go Hi-Z immediately. The OATTs also ...
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ASAHI KASEI Addr Register Name 02H Clock and Format Control default DFS: Sampling Speed Control (see Table 1 and Table 3) Default : normal speed mode. Ored with DFS pin internally. CMODE, CKS1-0: Master Clock Frequency Select (see Table 1) ...
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ASAHI KASEI Addr Register Name 04H Lch OATT Control 05H Rch OATT Control default ATTL/R6-0: DAC ATT Level (see Table 8) Default : 7FH (0dB) The OATTs are set to “00H” when PDN pin goes “L”. After returning to “H”, ...
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ASAHI KASEI Internal Data Gain (dB) (DATT) 127 8031 126 7775 125 7519 : : 112 4191 111 3999 110 3871 : : 96 2079 95 1983 94 1919 : : 80 1023 79 975 78 943 : : 64 ...
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ASAHI KASEI Figure 11 shows the system connection diagram. An evaluation board (AKD4528) is available which demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. 4.75 ∼ 5.25V 0.1u Analog Supply 2. Rch 2 Input ...
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ASAHI KASEI 2. Voltage Reference The differential voltage between VREF and AGND sets the analog input/output range. VREF pin is normally connected to VA with a 0.1µF ceramic capacitor. VCOM is a signal ground of this chip. An electrolytic capacitor ...
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ASAHI KASEI 4. Analog Outputs The analog outputs are full differential outputs and nominally 0.54 x VREF Vpp centered in the internal common voltage (about VA/2). The differential outputs are summed externally, Vout=(AOUT+) − (AOUT−) between AOUT+ and AOUT−. If ...
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ASAHI KASEI AOUT- AOUT+ Figure 14. External 2nd order LPF Example (using dual supply op-amp) AOUT- AOUT+ Figure 15. External low cost 1st order LPF Example (using dual supply op-amp) Peripheral I/F Example The digital inputs of the AK4528 are ...
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ASAHI KASEI 28pin VSOP (Unit: mm) *9.8±0.2 0.675 28 1 0.22±0.1 Seating Plane NOTE: Dimension "*" does not include mold flash. Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0011-E-01 PACKAGE 15 A ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0011-E-01 MARKING AKM AK4528VF XXXBYYYYC XXXBYYYYC: Date code identifier IMPORTANT NOTICE - 29 - [AK4528] ...