AT32UC3A364 Atmel Corporation, AT32UC3A364 Datasheet - Page 238

no-image

AT32UC3A364

Manufacturer Part Number
AT32UC3A364
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A364

Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364-ALU
Manufacturer:
ATMEL
Quantity:
230
Part Number:
AT32UC3A364-ALUR
Manufacturer:
AVAGO
Quantity:
11 439
Part Number:
AT32UC3A364-ALUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A364-ALUT
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A364-CTUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A364-CTUT
Manufacturer:
Atmel
Quantity:
10 000
Company:
Part Number:
AT32UC3A364-U
Quantity:
355
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
• LPCB: Low Power Configuration Bits
32072G–11/2011
LPCB
0
1
2
3
Low Power Configuration
Low power feature is inhibited: no power-down, self refresh or deep power-down command is issued to
the SDRAM device.
The SDRAMC issues a self refresh command to the SDRAM device, the SDCLK clock is deactivated and
the SDCKE signal is set low. The SDRAM device leaves the self refresh mode when accessed and
enters it after the access.
The SDRAMC issues a power-down command to the SDRAM device after each access, the SDCKE
signal is set to low. The SDRAM device leaves the power-down mode when accessed and enters it after
the access.
The SDRAMC issues a deep power-down command to the SDRAM device. This mode is unique to low-
power SDRAM.
238

Related parts for AT32UC3A364