AT32UC3A4128 Atmel Corporation, AT32UC3A4128 Datasheet - Page 794
AT32UC3A4128
Manufacturer Part Number
AT32UC3A4128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
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- Download datasheet (16Mb)
28.7.4
Name:
Access Type:
Offset:
Reset Value:
• CHn: Channel n Disable
32072G–11/2011
CH7
31
23
15
–
–
–
7
Writing a one to these bits will clear the corresponding bit in CHSR.
Writing a zero to these bits has no effect.
These bits always read a zero.
Warning: If the corresponding channel is disabled during a conversion or if it is disabled then reenabled during a conversion, its
associated data and its corresponding EOC and OVRE flags in SR are unpredictable.
Channel Disable Register
CH6
30
22
14
CHDR
Write-only
0x14
0x00000000
–
–
–
6
CH5
29
21
13
–
–
–
5
CH4
28
20
12
–
–
–
4
CH3
27
19
11
–
–
–
3
CH2
26
18
10
–
–
–
2
CH1
25
17
–
–
9
–
1
CH0
24
16
–
–
8
–
0
794
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