AT89C5131A-L Atmel Corporation, AT89C5131A-L Datasheet - Page 116

no-image

AT89C5131A-L

Manufacturer Part Number
AT89C5131A-L
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5131A-L

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 3.6
Timers
4
Isp
UART/USB
Watchdog
Yes
USB Controller
Description
Figure 56. USB Device Controller Block Diagram
116
AT89C5131A-L
D+
D-
USB
D+/D-
Buffer
DPLL
.
The USB device controller provides the hardware that the AT89C5131 needs to inter-
face a USB link to a data flow stored in a double port memory (DPRAM).
The USB controller requires a 48 MHz ±0.25% reference clock, which is the output of
the AT89C5131 PLL (see Section “PLL”, page 14) divided by a clock prescaler. This
clock is used to generate a 12 MHz Full-speed bit clock from the received USB differen-
tial data and to transmit data according to full speed USB device tolerance. Clock
recovery is done by a Digital Phase Locked Loop (DPLL) block, which is compliant with
the jitter specification of the USB bus.
The Serial Interface Engine (SIE) block performs NRZI encoding and decoding, bit stuff-
ing, CRC generation and checking, and the serial-parallel data conversion.
The Universal Function Interface (UFI) realizes the interface between the data flow and
the Dual Port RAM.
SIE
48 MHz
12 MHz
+/- 0.25%
UFI
C51
Microcontroller
Interface
Up to 48 MHz
UC_sysclk
4338F–USB–08/07

Related parts for AT89C5131A-L