AT89C5131A-M Atmel Corporation, AT89C5131A-M Datasheet - Page 56
AT89C5131A-M
Manufacturer Part Number
AT89C5131A-M
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5130A-M.pdf
(188 pages)
2.AT89C5130A-M.pdf
(4 pages)
3.AT89C5130A-M.pdf
(34 pages)
Specifications of AT89C5131A-M
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/USB
Watchdog
Yes
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AT89C5130A/31A-M
Table 13-1.
Reset Value = 0000 0000b
Bit addressable
Number
Bit
TF2
7
6
5
4
3
2
1
0
7
Mnemonic
CP/RL2#
T2CON Register
T2CON - Timer 2 Control Register (C8h)
EXEN2
RCLK
C/T2#
EXF2
TCLK
EXF2
TR2
TF2
Bit
6
Description
Timer 2 overflow Flag
Must be cleared by software.
Set by hardware on Timer 2 overflow, if RCLK = 0 and TCLK = 0.
Timer 2 External Flag
Set when a capture or a reload is caused by a negative transition on T2EX pin if
EXEN2 = 1.
When set, causes the CPU to vector to Timer 2 interrupt routine when Timer 2 interrupt
is enabled.
Must be cleared by software. EXF2 doesn’t cause an interrupt in Up/down counter
mode (DCEN = 1).
Receive Clock bit
Cleared to use Timer 1 overflow as receive clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as receive clock for serial port in mode 1 or 3.
Transmit Clock bit
Cleared to use Timer 1 overflow as transmit clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as transmit clock for serial port in mode 1 or 3.
Timer 2 External Enable bit
Cleared to ignore events on T2EX pin for Timer 2 operation.
Set to cause a capture or reload when a negative transition on T2EX pin is detected, if
Timer 2 is not used to clock the serial port.
Timer 2 Run control bit
Cleared to turn off Timer 2.
Set to turn on Timer 2.
Timer/Counter 2 select bit
Cleared for timer operation (input from internal clock system: F
Set for counter operation (input from T2 input pin, falling edge trigger). Must be 0 for
clock out mode.
Timer 2 Capture/Reload bit
If RCLK = 1 or TCLK = 1, CP/RL2# is ignored and timer is forced to Auto-reload on
Timer 2 overflow.
Cleared to Auto-reload on Timer 2 overflows or negative transitions on T2EX pin if
EXEN2 = 1.
Set to capture on negative transitions on T2EX pin if EXEN2 = 1.
RCLK
5
TCLK
4
EXEN2
3
TR2
2
C/T2#
CLK PERIPH
1
4337K–USB–04/08
).
CP/RL2#
0
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