AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 35

• Manufacturer Part Number: AT89C51CC02
• Manufacturer: Atmel Corporation

Specifications of AT89C51CC02

• Flash (kbytes): 16 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 20
• Uart: 1
• Can: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 0.5
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART/CAN
• Watchdog: Yes

FM0 Memory Architecture
User Space
Extra Row (XRow)
Hardware Security Byte
Column Latches
Cross Flash Memory Access
Description
4126L–CAN–01/08
The Flash memory is made up of 4 blocks (See Figure 13):
1. The memory array (user space) 16K Bytes
2. The Extra Row
3. The Hardware security bits
4. The column latch registers
This space is composed of a 16K Bytes Flash memory organized in 128 pages of 128
Bytes. It contains the user’s application code.
This row is a part of FM0 and has a size of 128 Bytes. The extra row may contain infor-
mation for boot loader usage.
The Hardware security Byte space is a part of FM0 and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
The column latches, also part of FM0, have a size of full page (128 Bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
The FM0 memory can be programmed as describe on Table 21. Programming FM0
from FM0 is impossible.
The FM1 memory can be program only by parallel programming.
Table 21 show all software Flash access allowed.
Table 21. Cross Flash Memory Access
(user Flash)
(boot Flash)
FM0
FM1
Load column latch
Load column latch
Action
Read
Write
Read
Write
(user Flash)
FM0
ok
ok
ok
ok
ok
-
AT/T89C51CC02
(boot Flash)
FM1
ok
-
-
-
-
-
35