AT89C51RC2 Atmel Corporation, AT89C51RC2 Datasheet - Page 25

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AT89C51RC2

Manufacturer Part Number
AT89C51RC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Registers
4180E–8051–10/06
Table 19. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX0X 00’HSB. XRAM’0b (see Table 65)
Not bit addressable
Number
DPU
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
EXTRAM
XRS1
XRS0
DPU
Bit
M0
AO
6
-
-
-
Disable Weak Pull-up
Cleared to activate the permanent weak pull up when latch data is logical 1
Set to disactive the weak pull-up (reduce power consumption)
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Pulse Length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
XRAM Size
EXTRAM Bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output Bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used). (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.
XRS1 XRS0 XRAM size
0
0
1
1
M0
5
0
1
0
1
256 Bytes (default)
512 Bytes
768 Bytes
1024 Bytes
4
-
XRS1
3
AT89C51RB2/RC2
XRS0
2
EXTRAM
1
AO
0
25

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