AT89LP51ID2 Atmel Corporation, AT89LP51ID2 Datasheet - Page 12

• Manufacturer Part Number: AT89LP51ID2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ID2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

2.3.9
2.3.10
12
AT89LP51RD2/ED2/ID2 Preliminary
Security
Programming
The AT89LP51RD2/ED2/ID2 does not support the external access pin (EA). Therefore it is not
possible to execute from external program memory in address range 0000H–1FFFH. When the
third Lockbit is enabled (Lock Mode 4) external program execution is disabled for all addresses
above 1FFFH. This differs from AT89C51RD2/ED2/ID2 where Lock Mode 4 prevents EA from
being sampled low, but may still allow external execution at addresses outside the 8K internal
space.
The AT89LP51RD2/ED2/ID2 supports a richer command set for In-System Programming (ISP).
E x i s t i n g A T 8 9 C 5 1 R D 2 / E D 2 p r o g r a m m e r s s h o u l d b e a b l e t o p r o g r a m t h e
AT89LP51RD2/ED2/ID2 in byte mode. In page mode the AT89LP51RD2/ED2/ID2 only supports
programming of a half-page of 64 bytes and therefore requires an extra address byte as com-
pared to AT89C51RD2/ED2. Furthermore the device signature is located at addresses 0000H,
0001H and 0003H instead of 0000H, 0100H and 0200H.
Table 2-3.
Feature
Instruction Fetch in System Clocks
Instruction Execution Time in System Clocks
Default System Clock Divisor
Default Timer Prescaler Divisor
Pin Sampling Rate (INT0, INT1, T0, T1, T2, T2EX)
Minimum RST input pulse in System Clocks
Compatibility Mode versus Fast Mode Summary
Prescaler Rate
6, 12, 18 or 24
Compatibility
12
3
2
6
System Clock
1, 2, 3, 4 or 5
3714A–MICRO–7/11
Fast
1
1
1
2