AT89LP51ID2 Atmel Corporation, AT89LP51ID2 Datasheet - Page 90

• Manufacturer Part Number: AT89LP51ID2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ID2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

90
AT89LP51RD2/ED2/ID2 Preliminary
Note:
In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-
sponding external input pin, T2. In Fast mode the external input is sampled every clock cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is incre-
mented. The new count value appears in the register during the cycle following the one in which
the transition was detected. Since 2 clock cycles are required to recognize a 1-to-0 transition,
the maximum count rate is 1/2 of the system frequency. There are no restrictions on the duty
cycle of the input signal, but it should be held for at least one full clock cycle to ensure that a
given level is sampled at least once before it changes.
In Compatibility mode the counter input sampling is controlled by the prescaler. Since TPS
defaults to 6 in this mode, the pins are sampled every six system clocks. Therefore the input sig-
nal should be held for at least six clock cycles to ensure that a given level is sampled at least
once before it changes.
Table 14-1.
The following definitions for Timer 2 are used in the subsequent paragraphs:
Table 14-2.
RCLK + TCLK
BOTTOM
Symbol
MAX
MIN
0
0
0
1
X
X
In Fast Mode, TPS applies only when the T2X2 bit in CKCON0 is set. TPS always
applies in Compatibility Mode, therefore setting T2X2 in Compatibility Mode will halve
the timer frequency.
Timer 2 Operating Modes
Timer 2 Definitions
Definition
0000H
FFFFH
16-bit value of {RCAP2H,RCAP2L}
CP/RL2
X
X
X
0
0
1
f
TIMER
f
TIMER
f
TIMER
DCEN
=
0
1
X
X
X
X
=
----------------------------------------------- -
2
T2X2
=
-------------------- -
TPS
f
f
SYS
SYS
×
f
+
T2OE
SYS
(
1
TPS
X
X
0
0
0
1
Fast Mode and T2X2 = 0
+
1
Fast Mode and T2X2 = 1
)
TR2
1
1
1
1
1
0
Compatibility Mode
MODE
16-bit Auto-reload
16-bit Auto-reload Up-Down
16-bit Capture
Baud Rate Generator
Frequency Generator
(Off)
3714A–MICRO–7/11