AT89LP51RD2 Atmel Corporation, AT89LP51RD2 Datasheet - Page 206

• Manufacturer Part Number: AT89LP51RD2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RD2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

24.5.3
24.5.3.1
206
AT89LP51RD2/ED2/ID2 Preliminary
Bootloader Protocol Description
Physical Layer
Table 24-15. Software Security Byte
The two lock bits provide different levels of protection for the on-chip code and data, when pro-
grammed as shown in
Table 24-16.
Note:
The UART used to transmit information has the following configuration:
• Character: 8-bit data
• Parity: none
• Stop: 2 bits
• Flow control: none
• Baud Rate: autobaud is performed by the bootloader to compute the baud rate chosen by the
Security
Number
host.
Level
Bit
1-0
7
6
5
4
3
2
Program Lock Bits
1
2
3
7
-
X: Do not care
WARNING: Security level 2 and 3 should only be programmed after Flash verification.
Mnemonic
LB0
X
1
0
User Memory Lock Bits of the SSB
LB1-0
Bit
6
-
-
-
-
-
-
-
LB1
1
1
0
Table
Description
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
User Memory Lock Bits
See
Protection Description
No program lock features enabled.
Bootloader programming of the Flash is disabled.
Same as 2, also verify through Bootloader programming interface is disabled.
Table 24-16
24-16.
5
-
4
-
3
-
2
-
LB1
1
3714A–MICRO–7/11
LB0
0