AT89LP51RD2 Atmel Corporation, AT89LP51RD2 Datasheet - Page 65

• Manufacturer Part Number: AT89LP51RD2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RD2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

9.3
Table 9-3.
Table 9-4.
3714A–MICRO–7/11
Symbol
EA
EC
ET2
ES
ET1
EX1
ET0
EX0
Symbol
EADC
ECMP
ESPI
ETWI
EKBD
IEN0 = A8H
Bit Addressable
Bit
IEN1 = B1H
Bit Addressable
Bit
Interrupt Registers
Function
Global Interrupt Enable
All interrupts are disabled when EA = 0. When EA = 1, each interrupt source is enabled/disabled by setting /clearing its own enable bit.
PCA Interrupt Enable
Clear to disable the PCA interrupt. Set to enable the PCA interrupt when EA = 1.
Timer 2 Interrupt Enable
Clear to disable the Timer 2 interrupt. Set to enable the Timer 2 interrupt when EA = 1.
Serial Port Interrupt Enable
Clear to disable the UART interrupt. Set to enable the UART interrupt when EA = 1.
Timer 1 Interrupt Enable
Clear to disable the Timer 1 interrupt. Set to enable the Timer 1 interrupt when EA = 1.
External Interrupt 1 Enable.
Clear to disable the INT1 interrupt. Set to enable the INT1 interrupt when EA = 1.
Timer 0 Interrupt Enable
Clear to disable the Timer 0 interrupt. Set to enable the Timer 0 interrupt when EA = 1.
External Interrupt 0 Enable
Clear to disable the INT0 interrupt. Set to enable the INT0 interrupt when EA = 1.
Function
ADC Interrupt Enable.
Clear to disable the ADC interrupt. Set to enable the ADC interrupt when EA = 1.
Analog COmparator Interrupt Enable
Clear to disable the Analog Comparator interrupt. Set to enable the Analog Comparator interrupt when EA = 1.
SPI Interrupt Enable
Clear to disable the SPI interrupt. Set to enable the SPI interrupt when EA = 1.
TWI Interrupt Enable
Clear to disable the TWI interrupt. Set to enable the TWI interrupt when EA = 1.
Keyboard Interrupt Enable
Clear to disable the Keyboard interrupt. Set to enable the Keyboard interrupt when EA = 1.
IEN0 – Interrupt Enable Register 0
IEN1 – Interrupt Enable Register 1
EA
7
–
7
EC
6
–
6
EADC
ET2
5
5
AT89LP51RD2/ED2/ID2 Preliminary
ECMP
ES
4
4
ET1
3
–
3
ESPI
EX1
2
2
Reset Value = 0000 0000B
Reset Value = 0000 0000B
ETWI
ET0
1
1
EKBD
EX0
0
0
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