ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 36

• Manufacturer Part Number: ATmega168 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega168 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7. Power Management and Sleep Modes
7.0.1
36
ATmega48/88/168 Automotive
Sleep Mode Control Register – SMCR
Table 6-14.
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in
addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and
executes from the Reset Vector.
Figure 6-1 on page 24
distribution. The figure is helpful in selecting an appropriate sleep mode.
The Sleep Mode Control Register contains control bits for power management.
• Bits 7..4 Res: Reserved Bits
These bits are unused bits in the ATmega48/88/168, and will always read as zero.
• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 7-1.
Bit
Read/Write
Initial Value
CLKPS3
SM2
1
1
1
0
0
0
0
1
Clock Prescaler Select
Sleep Mode Select
R
7
–
0
CLKPS2
SM1
0
0
1
1
0
1
1
1
presents the different clock systems in the ATmega48/88/168, and their
R
6
–
0
CLKPS1
R
5
–
0
SM0
0
1
0
1
0
0
1
1
Table 7-1
R
4
–
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
CLKPS0
for a summary. If an enabled interrupt occurs
SM2
R/W
3
0
1
0
1
SM1
R/W
2
0
Clock Division Factor
SM0
R/W
Table
1
0
Reserved
Reserved
Reserved
7-1.
R/W
SE
0
0
7530I–AVR–02/10
SMCR