ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 155
ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 155 of 367
- Download datasheet (7Mb)
14.16.9
7647G–AVR–09/11
PSC Module n Input Control Register – PMICn
• Bit 4:3:2 – SWAPn: SWAP Funtion Select (not implemented in ATmega32M1 up to
When this bit is set; the channels PSCOUTnA and PSCOUTnB are exchanged. This allows to
invert the waveforms of both channels at one time.
• Bit 1 – PCCYC: PSC Complete Cycle
When this bit is set, the PSC completes the entire waveform cycle before halt operation
requested by clearing PRUN.
• Bit 0 – PRUN : PSC Run
Writing this bit to one starts the PSC.
The Input Control Registers are used to configure the 2 PSC’s Retrigger/Fault block A & B.
The 2 blocks are identical, so they are configured on the same way.
• Bit 7 – POVENn : PSC Module n Overlap Enable
Set this bit to disactivate the Overlap Protection. See the Section “Overlap Protection”,
page 143.
• Bit 6 – PISELn : PSC Module n Input Select
Clear this bit to select PSCINn as module n input.
Set this bit to select Comparator n output as module n input.
• Bit 5 –PELEVn : PSC Module n Input Level Selector
When this bit is clear, the low level of selected input generates the significative event for fault
function.
When this bit is set, the high level of selected input generates the significative event for fault
function.
• Bit 4 – PFLTEn : PSC Module n Input Filter Enable
Setting this bit (to one) activates the Input Noise Canceler. When the noise canceler is acti-
vated, the input from the input pin is filtered. The filter function requires four successive equal
valued samples of the input pin for changing its output. The Input is therefore delayed by four
oscillator cycles when the noise canceler is enabled.
• Bit 3 – PAOCn : PSC Module n 0 Asynchronous Output Control
When this bit is clear, Fault input can act directly to PSC module n outputs A & B. See
Section “PSC Input Configuration”, page 146.
• Bit 2:0 – PRFMn2:0: PSC Module n Input Mode
These three bits define the mode of operation of the PSC inputs.
Bit
Read/Write
Initial Value
revision C)
POVENn
R/W
7
0
PISELn
R/W
6
0
PELEVn
R/W
5
0
Atmel ATmega16/32/64/M1/C1
PFLTEn
R/W
4
0
PAOCn
R/W
3
0
PRFMn2
R/W
2
0
PRFMn1
R/W
1
0
PRFMn0
R/W
0
0
PMICn
155
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